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X00619MA5AL2STN/a50000avai0.8 A sensitive gate SCR


X00619MA5AL2 ,0.8 A sensitive gate SCRapplications where topology does not offer high I 30 to 200 µAGTcurrent for gate triggering.This de ..
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X00619MA5AL2
0.8 A sensitive gate SCR
May 2012 Doc ID 15755 Rev 2 1/10
X00619

0.8 A sensitive gate SCR
Datasheet − production data
Features
IT(RMS) = 0.8 A VDRM, VRRM = 600 V IGT = 30 to 200 µA
Applications
Limited gate current topologies Ground fault circuit interrupters Overvoltage crowbar protection in power
supplies Protection in electronic ballasts Capacitive discharge ignitions Ignitors (lighting, oven...)
Description

The X006 SCR can be used as on/off function in
applications where topology does not offer high
current for gate triggering.
This device is optimized in forward voltage drop
and inrush current capabilities for reduced power
losses and high reliability in harsh environments.
Table 1. Device summary
Characteristics X00619
2/10 Doc ID 15755 Rev 2
1 Characteristics





Table 2. Absolute ratings (limiting values, Tj = 25 °C unless otherwise specified)
Table 3. Electrical characteristics (Tj = 25 °C unless otherwise specified)
Table 4. Static electrical characteristics
X00619 Characteristics
Doc ID 15755 Rev 2 3/10



Table 5. Thermal resistances
Figure 1. Maximum average power
dissipation versus average
on-state current
Figure 2. Average and DC on-state current
versus case temperature (SOT -223)
Figure 3. Average and DC on-state current
versus lead temperature (TO-92)
Figure 4. Average and DC on-state current
versus ambient temperature (free
air convection)
Characteristics X00619
4/10 Doc ID 15755 Rev 2



Figure 5. Relative variation of thermal
impedance junction to ambient
versus pulse duration
Figure 6. Relative variation of gate trigger,
holding and latching current versus
junction temperature
Figure 7. Relative variation of holding
current versus gate-cathode
resistance (typical values)
Figure 8. Relative variation of dV/dt immunity
versus gate-cathode resistance
(typical values)
Figure 9. Relative variation of dV/dt immunity
versus gate-cathode capacitance
(typical values)
Figure 10. Surge peak on-state current versus
number of cycles
X00619 Characteristics
Doc ID 15755 Rev 2 5/10

Figure 13. Thermal resistance junction to ambient versus copper surface under tab (SOT-223)
Figure 11. Non repetitive surge peak on state
current for a sinusoidal pulse and
corresponding value of I2T
Figure 12. On-state characteristics (maximum
values)
Ordering information scheme X00619
6/10 Doc ID 15755 Rev 2 Ordering information scheme
Figure 14. Ordering information scheme
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