100314QCX ,Low Power Quint Differential Line ReceiverElectrical Characteristics (Note 3)V = −4.2V to −5.7V, V = V = GND, T = 0°C to +85°C EE CC CCA CSym ..
100314QI ,Low Power Quint Differential Line Receiver100314 Low Power Quint Differential Line ReceiverFebruary 1990Revised August 2000100314Low Power Qu ..
100314SC ,Low Power Quint Differential Line Receiver100314 Low Power Quint Differential Line ReceiverFebruary 1990Revised August 2000100314Low Power Qu ..
100315 ,Low-Skew Quad Clock Driver100315Low-SkewQuadClockDriverJuly1992100315Low-SkewQuadClockDriverGeneralDescription
100315 ,Low-Skew Quad Clock Driver
100315SC ,Low-Skew Quad Clock DriverFeaturesThe 100315 contains four low skew differential drivers,
100314PC-100314QC-100314QCX-100314QI-100314SC
Low Power Quint Differential Line Receiver
100314 Low Power Quint Differential Line Receiver February 1990 Revised August 2000 100314 Low Power Quint Differential Line Receiver General Description Features The 100314 is a monolithic quint differential line receiver35% power reduction of the 100114 with emitter-follower outputs. An internal reference supply2000V ESD protection (V ) is available for single-ended reception. When used in BBPin/function compatible with 100114 single-ended operation the apparent input threshold of the Voltage compensated operating range = −4.2V to −5.7V true inputs is 25 mV to 30 mV higher (positive) than the Available to industrial grade temperature range threshold of the complementary inputs. Unlike other F100K ECL devices, the inputs do not have input pull-down resis- (PLCC package only) tors. Active current sources provide common-mode rejection of 1.0V in either the positive or negative direction. A defined output state exists if both inverting and non-inverting inputs are at the same potential between V and V . The EE CC defined state is logic HIGH on the O –O outputs. a e Ordering Code: Order Number Package Number Package Description 100314SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 100314PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 100314QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100314QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagrams 24-Pin DIP/SOIC 28-Pin PLCC Pin Descriptions Pin Names Description D –D Data Inputs a e D –D Inverting Data Inputs a e O –O Data Outputs a e O –O Complementary Data Outputs a e © 2000 DS010260
