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100311QC-100311QCX-100311QI Fast Delivery,Good Price
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100311QCNASN/a34avaiLow Skew 1:9 Differential Clock Driver
100311QCXFAIN/a56avaiLow Skew 1:9 Differential Clock Driver
100311QIFAIRCHILDN/a9avaiLow Skew 1:9 Differential Clock Driver


100311QCX ,Low Skew 1:9 Differential Clock Driver100311 Low Skew 1:9 Differential Clock DriverFebruary 1990Revised November 1999100311Low Skew 1:9 D ..
100311QI ,Low Skew 1:9 Differential Clock DriverFeaturesThe 100311 contains nine low skew differential drivers,

100311QC-100311QCX-100311QI
Low Skew 1:9 Differential Clock Driver
100311 Low Skew 1:9 Differential Clock Driver February 1990 Revised November 1999 100311 Low Skew 1:9 Differential Clock Driver General Description Features The 100311 contains nine low skew differential drivers,Low output-to-output skew designed for generation of multiple, minimum skew differ-2000V ESD protection ential clocks from a single differential input (CLKIN, 1:9 low skew clock driver CLKIN). If a single-ended input is desired, the V output BB Differential inputs and outputs pin may be used to drive the remaining input line. A HIGH Available to industrial grade temperature range on the enable pin (EN) will force a LOW on all of the CLK n (PLCC package only) outputs and a HIGH on all of the CLK output pins. The n 100311 is ideal for distributing a signal throughout a system without worrying about the original signal becoming too corrupted by undesirable delays and skew. Ordering Code: Order Number Package Number Package Description 100311QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100311QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram 28-Pin PLCC Pin Descriptions Truth Table Pin Names Description CLKIN CLKIN EN CLK CLK n n CLKIN, CLKIN Differential Clock Inputs LH L L H EN Enable HL L H L CLK , CLK Differential Clock Outputs XX H L H 0–8 0–8 V V Output BB BB NC No Connect © 1999 DS010648
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