100310QC ,Low Skew 2:8 Differential Clock DriverElectrical Characteristics (Note 3)V = −4.2V to −5.7V, V = V = GND, T = 0°C to +85°C EE CC CCA CSym ..
100310QC ,Low Skew 2:8 Differential Clock Driverapplications that need theability to freely select between two clocks, or to maintainthe ability to ..
100311QC ,Low Skew 1:9 Differential Clock DriverFeaturesThe 100311 contains nine low skew differential drivers,
100310QC
Low Skew 2:8 Differential Clock Driver
100310 Low Skew 2:8 Differential Clock Driver October 1991 Revised November 1999 100310 Low Skew 2:8 Differential Clock Driver General Description Features The 100310 is a low skew 8-bit differential clock driverLow output to output skew which is designed to select between two separate differen-Differential inputs and outputs tial clock inputs. The low output to output skew (< 50 ps) is Allows multiplexing between two clock inputs maintained for either clock input. A LOW on the select pin Voltage compensated operating range: −4.2V to −5.7V (SEL) selects CLKINA, CLKINA and a HIGH on the SEL pin selects the CLKINB, CLKINB inputs.Available to industrial grade temperature range (PLCC package only) The 100310 is ideal for those applications that need the ability to freely select between two clocks, or to maintain the ability to switch to an alternate or backup clock should a problem arise with the primary clock source. A V output is provided for single-ended operation. BB Ordering Code: Order Number Package Number Package Description 100310QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 100310QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagram 28-Pin PLCC Truth Table Pin Descriptions Pin Names Description CLK CLK CLKINA CLKINA CLKINB CLKINB SEL n n CLKIN , CLKIN Differential Clock Inputs HL X X L H L n n SEL Select LH X X L L H CLK , CLK Differential Clock Outputs XX H L H H L 0–7 0–8 V V Output XX L H H L H BB BB NC No Connect © 1999 DS010943
