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Partno Mfg Dc Qty AvailableDescript
100307PCNSN/a30avaiLow Power Quint Exclusive OR/NOR Gate
100307QCNS.FAIN/a69avaiLow Power Quint Exclusive OR/NOR Gate
100307QCFAIRCHILN/a162avaiLow Power Quint Exclusive OR/NOR Gate
100307QCFAIN/a217avaiLow Power Quint Exclusive OR/NOR Gate
100307QCNSN/a16avaiLow Power Quint Exclusive OR/NOR Gate
100307QCFAIRCHILDN/a770avaiLow Power Quint Exclusive OR/NOR Gate
100307QCXFAIN/a29avaiLow Power Quint Exclusive OR/NOR Gate
100307QINSCN/a3avaiLow Power Quint Exclusive OR/NOR Gate


100307QC ,Low Power Quint Exclusive OR/NOR GateElectrical CharacteristicsV = −4.2V to −5.7V, V = V = GNDEE CC CCAT = 0°CT = +25°CT = +85°CC C CSym ..
100307QC ,Low Power Quint Exclusive OR/NOR GateElectrical CharacteristicsV = −4.2V to −5.7V, V = V = GNDEE CC CCAT = 0°CT = +25°CT = +85°CC C CSym ..
100307QCX ,Low Power Quint Exclusive OR/NOR GateFeaturesThe 100307 is monolithic quint exclusive-OR/NOR gate.

100307PC-100307QC-100307QCX-100307QI
Low Power Quint Exclusive OR/NOR Gate
100307 Low Power Quint Exclusive OR/NOR Gate August 1989 Revised August 2000 100307 Low Power Quint Exclusive OR/NOR Gate General Description Features The 100307 is monolithic quint exclusive-OR/NOR gate.Low Power Operation The Function output is the wire-OR of all five exclusive-OR2000V ESD protection outputs. All inputs have 50 kΩ pull-down resistors. Pin/function compatible with 100107 Voltage compensated operating range = −4.2V to −5.7V Available to industrial grade temperature range (PLCC package only) Ordering Code: Order Number Package Number Package Description 1000307PC N24E 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-010, 0.400 Wide 1000307QC V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square 1000307QI V28A 28-Lead Plastic Lead Chip Carrier (PLCC), JEDEC MO-047, 0.450 Square Industrial Temperature Range (−40°C to +85°C) Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Logic Symbol Connection Diagrams 24-Pin DIP Pin Descriptions Pin Names Description D –D Data Inputs na ne 28-Pin PLCC F Function Output O –O Data Outputs a e O –O Complementary a e Data Outputs Logic Equation F = (D ⊕ D ) + (D ⊕ D ) + (D ⊕ D ) + 1a 2a 1b 2b 1c 2c (D ⊕ D ) + (D ⊕ D ). 1d 2d 1e 2e © 2000 DS010582
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