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XIO2001ZAJTIN/a25avaiPCI Express? (PCIe) to PCI Bus Translation Bridge 144-NFBGA 0 to 70


XIO2001ZAJ ,PCI Express? (PCIe) to PCI Bus Translation Bridge 144-NFBGA 0 to 70Features • Five 3.3-V, Multifunction, General-Purpose I/OTerminals1• Full ×1 PCI Express™ Throughpu ..
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XIO2200AZGW ,x1 PCI Express to 1394a OHCI and 2-Port PHY 176-BGA MICROSTAR Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ..
XL0840 ,SENSITIVE GATE 0.8A SCRSFEATURESSymbol Value UnitI 0.8 AT(RMS)GV400 VDRMKI 200 μAGTDESCRIPTIONThanks to its highly sensitiv ..
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XIO2001ZAJ
x1 PCI Express to PCI Bus Translation Bridge
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XIO2001

SCPS212I –MAY 2009–REVISED JANUARY 2016
XIO2001 PCI Express to PCI Bus Translation Bridge Features
Full ×1 PCI Express™ Throughput Fully Compliant With PCI Expressto PCI/PCI-X
Bridge Specification, Revision 1.0 Fully Compliant With PCI Express Base
Specification, Revision 2.0 Fully Compliant With PCI Local Bus Specification,
Revision 2.3 PCI Express Advanced Error Reporting Capability
Including ECRC Support Supportfor D1, D2, D3hot, and D3cold Active-State Link Power Management Saves
Power When Packet Activityon the PCI Express
Linkis Idle, Using Both L0s andL1 States Wake Event and Beacon Support Error Forwarding Including PCI Express Data
Poisoning and PCI Bus Parity Errors Uses 100-MHz Differential PCI Express Common
Reference Clockor 125-MHz Single-Ended,
Reference Clock Optional Spread Spectrum Reference Clockis
Supported Robust Pipeline Architectureto Minimize
Transaction Latency Full PCI Local Bus 66-MHz/32-Bit Throughput Supportfor Six Subordinate PCI Bus Masters with
Internal Configurable, 2-Level Prioritization
Scheme Internal PCI Arbiter Supporting Upto6 External
PCI Masters Advanced PCI Express Message Signaled
Interrupt Generation for Serial IRQ Interrupts External PCI Bus Arbiter Option PCI Bus LOCK Support Test Support Override Support (25 MHz, (25 MHzor Options VAUX Power Five 3.3-V, Multifunction, General-Purpose I/O
Terminals Memory-Mapped EEPROM Serial-Bus Controller
Supporting PCI Express Power Budget/Limit
Extensions for Add-In Cards Compact Footprint, Lead-Free 144-Ball, ZAJ
MicroStar™ BGA, Lead-Free 169-Ball ZGU
MicroStar BGA, and PowerPad™ HTQFP 128-Pin
PNP Package Applications Consumer Applications: PC Notebooks PCIe Add-In Cards Multi-Function Printers Network Routers and Switches Industrial Applications Industrial PCs Video Surveillance Systems Description
The XIO2001isa single-function PCI Expressto PCI
translation bridge thatis fully compliantto the PCI
Expressto PCI/PCI-X Bridge Specification, Revision
1.0. For downstream traffic, the bridge simultaneously
supports upto eight posted and four non-posted
transactions. For upstream traffic, upto six posted
and four non-posted transactions are simultaneously
supported.
The PCI Express interfaceis fully compliantto the
PCI Express Base Specification, Revision 2.0.
The PCI Express interface supportsa ×1 link
operatingat full 250 MB/s packet throughputin each
direction simultaneously. Also, the bridge supports
the advanced error reporting including extended CRC
(ECRC) as defined in the PCI Express Base
Specification. Supplemental firmwareor softwareis
requiredto fully use bothof these features.
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