| Partno |
Mfg |
Dc |
Qty |
Available | Descript |
| X9317TM8I-2.7 |
XICOR |
N/a |
15 |
 |
Low Noise, Low Power, 100 Taps |
| X9317TM8I-2.7 |
XICRO |
N/a |
1000 |
|
Low Noise, Low Power, 100 Taps |
X9317TS8I intersil, Low Noise, Low Power, 100 Taps
X9317TS8I-2.7 intersil, Low Noise, Low Power, 100 Taps
X9317TS8I-2.7T XICOR
X9317TS8Z INTERSIL , Digitally Controlled Potentiometer (XDCP™)
X9317TV8IZ-2.7 INTERSIL, Digitally Controlled Potentiometer (XDCP™)
X9317TV8IZ-4.5 INTERSIL
X9317TV8Z INTERSIL, Digitally Controlled Potentiometer (XDCP™)
X9317TV8Z-2.7T1 INTERSIL
X9317U XICOR
X9317U XICOR
X9317UM8 XIOCR, Low Noise, Low Power, 100 Taps
X9317UM8 INTERSIL, Low Noise, Low Power, 100 Taps
X9317UM8 XICOR, Low Noise, Low Power, 100 Taps
X9317UM8-2.7 XICOR, Low Noise, Low Power, 100 Taps
X9317UM8I XIOCR, Low Noise, Low Power, 100 Taps
X9317UM8I XICOR, Low Noise, Low Power, 100 Taps
X9317UM8I-2.7 XICOR, Low Noise, Low Power, 100 Taps
X9317UM8I-2.7 INTERSIL, Low Noise, Low Power, 100 Taps
X9317UM8I-2.7 intersil/xicor, Low Noise, Low Power, 100 Taps
X9317UP XICOR , Low Noise, Low Power, 100 Taps
X9317US8 INTERSIL , Low Noise, Low Power, 100 Taps
X9317US8-2.7 INTERSIL, Low Noise, Low Power, 100 Taps
X9317US8I INTERSIL , Low Noise, Low Power, 100 Taps
X9317US8IZ-2.7T1 intersil
X9317US8IZT1 intersil
X9317US8T1 INTERSIL
X9317US8Z INTERSIL, Digitally Controlled Potentiometer (XDCP™)
X9317TM8I-2.7 , Low Noise, Low Power, 100 Taps
X9317US8Z-2.7 , Digitally Controlled Potentiometer (XDCP™)
X9317UV8I-2.7 , Low Noise, Low Power, 100 Taps
X9317UV8I-2.7 , Low Noise, Low Power, 100 Taps
X9317WP , Low Noise, Low Power, 100 Taps
XC7336 ,36-Macrocell CMOS EPLDblock diagram ofcan be individually controlled by one of two dedicatedthe High-Density FB is shown ..
XC7336-15 ,36-Macrocell CMOS EPLDfeatures a power-management scheme The XC7336 has a multibit security system that controlswhich per ..
XC7336-7 ,36-Macrocell CMOS EPLDBlock Diagram2-23This document was created with FrameMaker402AND ARRAY AND ARRAYAND ARRAY AND ARRAY ..
