TSM112CDT ,3.3V 5V 12V HOUSEKEEPING ICTSM1123.3V 5V 12V HOUSEKEEPING IC ■ OVER VOLTAGE PROTECTION FOR 3.3V 5V AND 12V WITHOUT EXTE ..
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TSM112CD-TSM112CDT-TSM112CN
3.3V 5V 12V HOUSEKEEPING IC
OVER VOLTAGE PROTECTION FOR 3.3V 5V AND 12V WITHOUT EXTERNAL COM-PONENTS� UNDER VOLTAGE PROTECTION FOR 3.3V
5V AND 12V WITHOUT EXTERNAL COM-
PONENTS� OVER VOLTAGE PROTECTION FOR -12V
OR -5V WITH EXTERNAL COMPONENTS� EXTERNALLY ADJUSTABLE UNDER VOLT-
AGE BLANKING DURING POWER UP� POWER GOOD INPUT/OUTPUT� EXTERNALLY ADJUSTABLE PG DELAY� FAULT OUTPUT� REMOTE OUTPUT� EXTERNALLY ADJUSTABLE REMOTE
DELAY� PRECISION VOLTAGE REFERENCE� 2kV ESD PROTECTION
DESCRIPTIONThe TSM112 integrated circuit incorporates all
sensing circuitry to regulate and protect from over
voltage and under voltage a multiple output power
supply (3.3V, 5V and 12V).
TSM112 incorporates all the necessary functions
for Housekeeping features which allow safe oper-
ation in all conditions, and very high system inte-
gration.
TSM112 integrates a precise voltage reference.
APPLICATION PC SMPS Triple Power Line Housekeeping
IC (3.3V 5V 12V)
ORDER CODE
N = Dual in Line Package (DIP)
D = Small Outline Package (SO) - also available in Tape & Reel (DT)
PIN CONNECTIONS (top view)
TSM1123.3V 5V 12V HOUSEKEEPING IC
TSM112
PIN DESCRIPTION
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS Over and Under Voltage Inputs can go higher than Vcc within the allowed Max Rating range All voltage values, except differential voltage are with respect to network ground terminal.
TSM112
ELECTRICAL CHARACTERISTICS Tamb = 25°C and Vcc = 17V (unless otherwise specified) Do not short circuit the Vref Pin
TSM112
Figure 1 : Figure 1: Application Schematic
Figure 2 : Internal Schematic
TSM112
Figure 3 : Figure 3 : Detailed Internal Schematic
TSM112: Housekeeping IC.TSM112 is a one chip solution for all PC SMPS: it
integrates on one chip the Housekeeping Circuitry
(Over Voltage and Under Voltage protections, with
adequate sequencing).
Triple Power Line Protection.The TSM112 Housekeeping Circuit is dedicated to
3.3V, 5V and 12V power lines protection. It inte-
grates a Precision Voltage Reference, a Triple
Over Voltage Protection Circuit and a Triple Under
Voltage Protection Circuit as well as all the neces-
sary logic and transient timing management cir-
cuits for optimal and secure communication with
the motherboard, during start up, switch off and
stabilized conditions.
Over Voltage ProtectionThe Over Voltage Protection Circuit is made of
three comparators with internal voltage thresholds
(Vov33, Vov5, Vov12) which do not require any
external components for proper operation. The
outputs of these three comparators are ORed.
Under Voltage ProtectionThe Under Voltage Protection Circuit is made of
three comparators with internal voltage thresholds
(Vuv33, Vuv5, Vuv12) which do not require any
external components for proper operation. The
outputs of these three comparators are ORed, and
blanked by an internal delay circuitry (Power Up
Blanking - Tuv) which can be adjusted with an ex-
ternal capacitor (Cuv). This allows that during
power up, the under voltage protection circuit is in-
hibited.
Latch OFFThe Over Voltage and Under Voltage Circuits out-
puts are again ORed before activating a latch.
When activated, this latch commands the full
switch OFF of the three main power lines (3.3V,
5V, 12V) by an external link between the house-
keeping and the primary PWM circuits via the
main optocoupler or any other device . Note that
the Under Voltage Circuit, after Power Up UV
blanking, bears no other delay to the latch setting
input whereas the Over Voltage circuit bears an
additional Tfault delay time. This allows an effi-
cient protection against Output Short Circuit con-
ditions.
Power GoodThe Over Voltage and Under Voltage Circuits are
Ored to switch the Power Good output active (PG)
to warn the motherboard that the voltage of at
least one of the three power lines is out of range.
The PG activation bears an internal Tpg delay cir-
cuitry which can be adjusted with an external ca-
pacitor (Cpg).
Remote ControlThanks to this information link to the motherboard,
a resetting signal to the latch is achievable with
the Remote pin (REM). When the Remote pin is
active, the external Fault link between House-
keeping circuit and the PWM generator is active
(high = PWM OFF) and the PG pin is active (high).
Note that to reset effectively the latch, a minimum
width Remote pulse should be applied thanks to
an internal delay circuitry (Trem) which can be ad-
justed with an external capacitor (Crem).
TSM112PRINCIPLE OF OPERATION AND APPLICATION HINTS
