TSA1201IF Fast Delivery |IC PHOENIX CO.,LIMITED

TSA1201IF ,12-BIT, 50MSPS, 150MW A/D CONVERTERNCD11 (MSB)DRORVCCBEVCCBEGNDBEGNDBEVCCBIGNDBINC DGNDSRCNC OEBDGNDDFSBCLKAVCCDGNDAVCCD ..
TSA1203IF ,DUAL-CHANNEL, 12-BIT, 40MSPS A/D CONVERTERD1GNDBID0(LSB)DVCCVCCBEDGNDGNDBESELECTVCCBICLKVCCBIDGNDOEBDVCCAVCC AVCCAVCCAGNDINCMIINCMQREFMIREFMQ ..
TSA1203IF ,DUAL-CHANNEL, 12-BIT, 40MSPS A/D CONVERTERAPPLICATIONS Q channelVINBQ■ Medical imaging and ultrasoundGND GNDBE■ 3G basestation■ I/Q signal pr ..
TSA1203IFT ,DUAL-CHANNEL, 12-BIT, 40MSPS A/D CONVERTERBLOCK DIAGRAM on a pipeline structure and digital error correction+2.5V/3.3V CLK SELECT OEB VC ..
TSA1203IFT ,DUAL-CHANNEL, 12-BIT, 40MSPS A/D CONVERTERapplications■ High speed data acquisition systemPACKAGE ■ Portable instrumentationORDER CODE ..
TSA1204IFT ,DUAL CHANNEL, 12-BIT, 20MSPS, 120MW, A/D CONVERTERapplications■ High speed data acquisition systemPACKAGE ■ Portable instrumentationORDER CODE 7 ..
UAF1780 ,DUAL 2A LOW DROP OUT INTELLIGENT POWER SWITCHCO SGS-THOMSON , WHERE?) a, ahf1h%N]CS UAF1780-1781-1782 DUAL 2 A LOW DROP OUT INTELLIGENT P ..
UAF41 , DIODE-PENTODE
UAF42AP ,Universal Active Filter.PIN CONFIGURATIONSP PACKAGEU PACKAGEPDIP-14SOIC-16(TOP VIEW)(TOP VIEW)Low-Pass V 1 14 Frequency Ad ..
UAF42AP ,Universal Active FilterMAXIMUM RATINGSOver operating free-air temperature range unless otherwise noted.UAF42 UNITPower Sup ..
UAF42AP ,Universal Active Filter SBFS002B –JULY 1992–REVISED OCTOBER 2010
UAF42AP+ ,Universal Active FilterMAXIMUM RATINGSOver operating free-air temperature range unless otherwise noted.UAF42 UNITPower Sup ..

TSA1201IF
12-BIT, 50MSPS, 150MW A/D CONVERTER
40mW @5Msps, 150mW @ 50Msps� 2.5V supply voltage with 2.5V/3.3V compati-bility for digital I/O� Input range: 2Vpp differential� SFDR up to 77dB @ 50Msps, Fin=15MHz� ENOB up to10.5 bits @ 50Msps, Fin=15MHz� Built-in reference voltage with external bias
capability� Pinout compatibility with TSA0801, TSA1001
and TSA1002
DESCRIPTION
The TSA1201 is a 12-bit, 50MHz maximum
sampling frequency Analog to Digital converter
using a CMOS technology combining high
performances and very low power consumption.
The TSA1201 is based on a pipeline structure and
digital error correction to provide excellent static
linearity and achieve 10.5 effective bits at
Fs=50Msps, and Fin=15MHz, with a global power
consumption of 150mW.
The TSA1201 features adaptive behavior to the
application. Its architecture allows to sample from
0.5Msps up to 50Msps, with a programmable
power consumption which makes the application
board even more optimized.
It integrates a proprietary track-and-hold structure
to ensure an high analog bandwidth of 1GHz and
enable IF-sampling.
Several features are available on the device. A
voltage reference is integrated in the circuit.
Differential or single-ended analog inputs can be
applied. The output data can be coded into two
differential formats. A Data Ready signal is raised
as the data is valid on the output and can be used
for synchronization purposes.
The TSA1201 is available in extended (-40°C to
+85°C) temperature range, in small 48 pins TQFP
package.
APPLICATIONS High speed data acquisition� High End cameras� Medical imaging and ultrasound� Portable instrumentation� High speed DSP interface� Digital communication - IF sampling
ORDER CODE
PIN CONNECTIONS (top view)
PACKAGE
TSA1201
12-BIT, 50MSPS, 150mW A/D CONVERTER
TSA1201
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS Condition VRefP-VRefM>0.3V
BLOCK DIAGRAM All voltages values, except differential voltage, are with respect to network ground terminal. The magnitude of input and output voltages
must never exceed -0.3V or VCC+0V
TSA1201
PIN CONNECTIONS (top view)
PIN DESCRIPTION
TSA1201
CONDITIONS
AVCC = DVCC = VCCBE = VCCBI = 2.5V,Fs= 50Msps,Fin=2MHz, Vin@ -1dBFS, VREFM=0V
Tamb = 25°C (unless otherwise specified)
TIMING CHARACTERISTICS
TIMING DIAGRAM
TSA1201
CONDITIONS
AVCC = DVCC = VCCBE = VCCBI = 2.5V,Fs= 50Msps,Fin=2MHz, Vin@ -1dBFS, VREFM=0V
Tamb = 25°C (unless otherwise specified)
ANALOG INPUTS
REFERENCE VOLTAGE See parameters definition for more information. Not fully tested over the temperature range. Guaranteed by sampling.
TSA1201
CONDITIONS
AVCC = DVCC = VCCBE = VCCBI = 2.5V,Fs= 50Msps,Fin=2MHz, Vin@ -1dBFS, VREFP=1V,
VREFM=0V
Tamb = 25°C (unless otherwise specified)
POWER CONSUMPTION
DIGITAL INPUTS AND OUTPUTS Equivalent load: Rload= 470Ω and Cload= 6pF Not fully tested over the temperature range. Guaranteed by sampling.
TSA1201
CONDITIONS
AVCC = DVCC = VCCBE = VCCBI = 2.5V,Fs= 50Msps, Vin@ -1dBFS, VREFP=1V, VREFM=0V
Tamb = 25°C (unless otherwise specified)
ACCURACY
DYNAMIC CHARACTERISTICS Equivalent load: Rload= 470Ω and Cload= 6pF Tmin= -40°C to Tmax= 85°C. Not fully tested over the temperature range. Guaranteed by sampling.
TSA1201
DEFINITIONS OF SPECIFIED PARAMETERS
STATIC PARAMETERS
Static measurements are performed through
method of histograms on a 2MHz input signal,
sampled at 50Msps, which is high enough to fully
characterize the test frequency response. The
input level is +1dBFS to saturate the signal.
Differential Non Linearity (DNL)
The average deviation of any output code width
from the ideal code width of 1LSB.
Integral Non linearity (INL)
An ideal converter presents a transfer function as
being the straight line from the starting code to the
ending code. The INL is the deviation for each
transition from this ideal curve.
DYNAMIC PARAMETERS
Dynamic measurements are performed by
spectral analysis, applied to an input sinewave of
various frequencies and sampled at 50Msps.
Spurious Free Dynamic Range (SFDR)
The ratio between the power of the worst spurious
signal (not always an harmonic) and the amplitude
of fundamental tone (signal power) over the full
Nyquist band. It is expressed in dBc.
Total Harmonic Distortion (THD)
The ratio of the rms sum of the first five harmonic
distortion components to the rms value of the
fundamental line. It is expressed in dB.
Signal to Noise Ratio (SNR)
The ratio of the rms value of the fundamental
component to the rms sum of all other spectral
components in the Nyquist band (fs/2) excluding
DC, fundamental and the first five harmonics.
SNR is reported in dB.
Signal to Noise and Distortion Ratio (SINAD)
Similar ratio as for SNR but including the harmonic
distortion components in the noise figure (not DC
signal). It is expressed in dB.
From the SINAD, the Effective Number of Bits
(ENOB) can easily be deduced using the formula:
SINAD= 6.02 × ENOB + 1.76 dB.
When the applied signal is not Full Scale (FS), but
has an A0 amplitude, the SINAD expression
becomes:
SINAD= 6.02 × ENOB + 1.76 dB + 20 log (2A0 /FS)
The ENOB is expressed in bits.
Analog Input Bandwidth
The maximum analog input frequency at which the
spectral response of a full power signal is reduced
by 3dB. Higher values can be achieved with
smaller input levels.
Effective Resolution Bandwidth (ERB)
The band of input signal frequencies that the ADC
is intended to convert without loosing linearity i.e.
the maximum analog input frequency at which the
SINAD is decreased by 3dB or the ENOB by 1/2
bit.
Pipeline delay
Delay between the initial sample of the analog
input and the availability of the corresponding
digital data output,on the output bus. Also called
data latency. It is expressed as a number of clock
cycles.
TSA1201
Static parameter: Integral Non Linearity
Fs=50MSPS; Fin=1MHz; Icca=45mA; N=131072pts
Static parameter: Differential Non Linearity
Fs=50MSPS; Fin=1MHz; Icca=45mA; N=131072pts
Linearity vs. Fs
Fin=10MHz; Rpol adjustment
Distortion vs. Fs
Fin=10MHz; Rpol adjustment
TSA1201
Linearity vs. Fin
Fs=50MHz; Icca=45mA
Linearity vs.Temperature
Fs=49.7MSPS; Icca=45mA; Fin=15MHz
Linearity vs. AVCC
Fs=50MSPS; Icca=45mA; Fin=10MHz
Distortion vs. Fin
Fs=50MHz; Icca=45mA
Distortion vs. Temperature
Fs=49.7MSPS; Icca=45mA; Fin=15MHz
Distortion vs. AVCC
Fs=50MSPS; Icca=45mA; Fin=10MHz

Partno	Mfg	Dc	Qty	Available	Descript
TSA1201IF	ST	N/a	72	avai	12-BIT, 50MSPS, 150MW A/D CONVERTER