IC Phoenix
 
Home ›  TT86 > TS68230CFN10-TS68230CFN-10-TS68230CFN8-TS68230CP10,HMOS PARALLEL INTERFACE/TIMER
TS68230CFN10-TS68230CFN-10-TS68230CFN8-TS68230CP10 Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
TS68230CFN-10 |TS68230CFN10STN/a200avaiHMOS PARALLEL INTERFACE/TIMER
TS68230CFN8STN/a200avaiHMOS PARALLEL INTERFACE/TIMER
TS68230CP10STN/a200avaiHMOS PARALLEL INTERFACE/TIMER
TS68230CFN10TEMICN/a95avaiHMOS PARALLEL INTERFACE/TIMER
TS68230CFN10STN/a200avaiHMOS PARALLEL INTERFACE/TIMER
TS68230CP10N/a29avaiHMOS PARALLEL INTERFACE/TIMER


TS68230CFN10 ,HMOS PARALLEL INTERFACE/TIMERTS68230HMOS PARALLEL INTERFACE/TIMER. TS68000 BUS COMPATIBLE. PORT MODES INCLUDE :BIT I/OUNIDIRECTI ..
TS68230CFN10 ,HMOS PARALLEL INTERFACE/TIMERapplications will be on. Port Modes Include :port A, port B, the handshake pins, the port interrupt ..
TS68230CFN-10 ,HMOS PARALLEL INTERFACE/TIMERapplications will be on. Port Modes Include :port A, port B, the handshake pins, the port interrupt ..
TS68230CFN8 ,HMOS PARALLEL INTERFACE/TIMERTS68230HMOS PARALLEL INTERFACE/TIMER. TS68000 BUS COMPATIBLE. PORT MODES INCLUDE :BIT I/OUNIDIRECTI ..
TS68230CP10 ,HMOS PARALLEL INTERFACE/TIMERFeatures of the PI/T include : 1.1. PORT MODE DESCRIPTION. TS68000 Bus CompatibleThe primary focus ..
TS68230CP10 ,HMOS PARALLEL INTERFACE/TIMERFeatures of the PI/T include : 1.1. PORT MODE DESCRIPTION. TS68000 Bus CompatibleThe primary focus ..
UA747 ,Dual General-Purpose Operational Amplifier         SLOS009A − D971, FEBRUARY 1971 − REVISED O ..
UA747CN ,Dual operational amplifiermaximum ratings over operating free-air temperature range (unless otherwise noted)uA747C uA747M UNI ..
UA747MJ , DUAL GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
UA747MJ , DUAL GENERAL-PURPOSE OPERATIONAL AMPLIFIERS
UA748CD ,PRECISION SINGLE BIPOLAR OP-AMPSABSOLUTE MAXIMUM RATINGS Symbol Parameter UA748M UA748I UA748C UnitVSupply voltage ±22 VCCVD ..
UA748CDT ,PRECISION SINGLE BIPOLAR OP-AMPSPIN CONFIGURATION AS THE LM101ADESCRIPTIONThe UA748 is a general purpose operational am-DSO8plifier ..


TS68230CFN10-TS68230CFN-10-TS68230CFN8-TS68230CP10
HMOS PARALLEL INTERFACE/TIMER
TS68230
January 1989
HMOS PARALLEL INTERFACE/TIMER TS68000 BUS COMPATIBLE. PORT MODES INCLUDE :
BIT I/O
UNIDIRECTIONAL 8 BIT AND 16 BIT
BIDIRECTIONAL 8 BIT AND 16 BIT. PROGRAMMABLE HANDSHAKING OPTIONS. 24-BIT PROGRAMMABLE TIMER MODES. FIVE SEPARATE INTERRUPT VECTORS. SEPARATE PORT AND TIMER INTERRUPT
SERVICE REQUESTS. REGISTERS ARE READ/WRITE AND DIRECT-
LY ADDRESSABLE. REGISTERS ARE ADDRESSED FOR MOVEP
(Move Peripheral) AND DMAC COMPATIBILITY
DESCRIPTION

The TS68230 parallel interface/timer (PI/T) provides
versatile double buffered parallel interfaces and a
system oriented timer for TS68000 systems. The pa-
rallel interfaces operate in unidirectional or bidirectio-
nal modes, either 8 or 16 bits wide. In the
unidirectional modes, an associated data direction
register determines whether each port pin is an input
or output. In the bidirectional modes the data direc-
tion registers are ignored and the direction is deter-
mined dynamically by the state of four handshake
pins. These programmable handshake pins provide
an interface flexible enough for connection to a wide
variety of low, medium, or high speed peripherals or
other computer systems. The PI/T ports allow use of
vectored or auto-vectored interrupts, and also pro-
vide a DMA request pin for connection to the 68440
direct memory access controller (DMAC) or a similar
circuit. The PI/T timer contains a 24-bit wide counter
and a 5-bit prescaler. The timer may be clocked by
the system clock (PI/T CLK pin) or by an external
clock (TIN pin), and a 5-bit prescaler can be used. It
can generate periodic interrupts, a square wave, or
a single interrupt after a programmed time period. It
can also be used for elapsed time measurement or
as a device watchdog.
1/61
INTRODUCTION
The TS68230 parallel interface/timer (PI/T) provides
versatile double buffered parallel interfaces and a
system oriented timer for TS68000 systems. The
parallel interfaces operate in unidirectional or bidi-
rectional modes, either 8 or 16 bits wide. In the uni-
directional modes, an associated data direction
register determines whether each port pin is an input
or output. In the bidirectional modes the data direc-
tion registers are ignored and the direction is deter-
mined dynamically by the state of four handshake
pins. These programmable handshake pins provide
an interface flexible enough for connection to a wide
variety of low, medium, or high speed peripherals or
other computer systems. The PI/T ports allow use
of vectored or autovectored interrupts, and also pro-
vide a DMA request pin for connection to the 68440
direct memory access controller (DMAC) or a similar
circuit. The PI/T timer contains a 24-bit wide counter
and a 5-bit prescaler. The timer may be clocked by
the system clock (PI/T CLK pin) or by an external
clock (TIN pin), and a 5-bit prescaler can be used.
It can generate periodic interrupts, a square wave,
or a single interrupt after a programmed time period.
It can also be used for elapsed time measurement
or as a device watchdog.
Features of the PI/T include : . TS68000 Bus Compatible. Port Modes Include :
Bit I/O
Unidirectional 8 Bit and 16 Bit
Bidirectional 8 Bit and 16 Bit. Programmable Handshaking Options. 24-Bit Programmable Timer Modes. Five Separate Interrupt Vectors. Separate Port and Timer Interrupt Service
Requests. Registers are Read/Write and Directly
Addressable. Registers are Addressed for MOVEP (Move
Peripheral) and DMAC Compatibility
The PI/T consists of two logically independent sec-
tions : the ports and the timer. The port section
consists of port A (PA0-PA7), port B (PB0-PB7), four
handshake pins (H1, H2, H3, and H4), two general
input/output (I/O) pins, and six dual-function pins.
The dual-function pins can individually operate as a
third port (port C) or an alternate function related to
either port A, port B, or the timer. The four program-
mable handshake pins, depending on the mode,
can control data transfer to and from the ports, or
can be used as interrupt generating inputs or I/O
pins. Refer to figure 1.1.
The timer consists of a 24-bit counter, optionally
clocked by a 5-bit prescaler. Three pins provide
complete timer I/O : PC2/TIN, PC3/TOUT, and
PC7/TIACK. Only the ones needed for the given
configuration perform the timer function, while the o-
thers remain port C I/O.
The system bus interface provides for asynchro-
nous transfer of data from the PI/T to a bus master
over the data bus (D0-D7). Data transfer acknow-
ledge (DTACK), register selects (RS1-RS5), timer
interrupt acknowledge (TIACK), read/write line
(R/W), chip select (CS), or port interrupt acknow-
ledge (PIACK) control data transfer between the
PI/T and an TS68000.
1.1. PORT MODE DESCRIPTION
The primary focus of most applications will be on
port A, port B, the handshake pins, the port interrupt
pins, and the DMA request pin. They are controlled
in the following way : the port general control register
contains a 2-bit field that specifies one of four ope-
ration modes. These govern the overall operation of
the ports and determine their interrelation-ships.
Some modes require additional information from
each port’s control register to further define its ope-
ration. In each port control register, there is a 2-bit
submode field that serves this purpose. Each port
mode/submode combination specifies a set of pro-
grammable characteristics that fully define the be-
havior of that port and two of the handshake pins.
This structure is summarized in table 1.1 and fig-
ure 1.2.
SECTION 1
TS68230

2/61
Figure 1.1 : Block Diagram.
TS68230

3/61
Table 1.1 :Port Mode Control Summary.
TS68230

4/61
Figure 1.2 : Port Mode Layout.
TS68230

5/61
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED