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TS4902IDSTN/a315avai300MW AT 3.3V SUPPLY AUDIO POWER AMPLIFIER WITH STANDBY MODE ACTIVE LOW
TS4902IDTSTN/a15000avai300MW AT 3.3V SUPPLY AUDIO POWER AMPLIFIER WITH STANDBY MODE ACTIVE LOW


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TS4902ID-TS4902IDT
300MW AT 3.3V SUPPLY AUDIO POWER AMPLIFIER WITH STANDBY MODE ACTIVE LOW
0.3W OUTPUT POWER @ Vcc=3.3V, THD=1%, f=1kHz, with an 8Ω load ULTRA LOW CONSUMPTION IN STANDBY
MODE (10nA) 77dB PSRR @ 217Hz from 5V to 2.2V ULTRA LOW POP & CLICK ULTRA LOW DISTORTION (0.1%) UNITY GAIN STABLE� AVAILABLE IN MiniSO8 & SO8
DESCRIPTION

The TS4902 is an audio power amplifier designed
to provide the best price to power ratio while pre-
serving high audio quality.
Available in MiniSO8 & SO8 package, it is capable
of delivering up to 0.7W of continuous RMS ouput
power into an 8Ω load @ 5V.
TS4902 is also exhibiting an outstanding 0.1%
distortion level (THD) from a 5V supply for a Pout
of 200mW RMS.
An externally controlled standby mode reduces
the supply current to less than 10nA. It also in-
cludes an internal thermal shutdown protection.
The unity-gain stable amplifier can be configured
by external gain setting resistors.
APPLICATIONS
Mobile Phones (Cellular / Cordless)� PDAs Portable Audio Devices
ORDER CODE
S = MiniSO Package (MiniSO) is only available in Tape & Reel (ST)
PIN CONNECTIONS (top view)

TS4902

300mW at 3.3V SUPPLY AUDIO POWER AMPLIFIER
WITH STANDBY MODE ACTIVE LOW
TS4902
ABSOLUTE MAXIMUM RATINGS
OPERATING CONDITIONS
All voltages values are measured with respect to the ground pin. The magnitude of input signal must never exceed VCC + 0.3V / GND - 0.3V Device is protected in case of over temperature by a thermal shutdown active @ 150°C. Exceeding the power derating curves during a long period, will cause abnormal operation. This thermal resistance can be reduced with a suitable PCB layout (see Power Derating Curves)
TS4902
ELECTRICAL CHARACTERISTICS

VCC = +5V, GND = 0V, Tamb = 25°C (unless otherwise specified)
VCC = +3.3V, GND = 0V, Tamb = 25°C (unless otherwise specified)3) Standby mode is actived when Vstdby is tied to GND Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz Standby mode is actived when Vstdby is tied to GND Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
3. All electrical values are made by correlation between 2.6V and 5V measurements
TS4902
ELECTRICAL CHARACTERISTICS

VCC = 2.6V, GND = 0V, Tamb = 25°C (unless otherwise specified)

REMARKS
1. All measurements, except PSRR measurements, are made with a supply bypass capacitor Cs = 100μF.
2. The standby response time is about 1μs.
Standby mode is actived when Vstdby is tied to GND Dynamic measurements - 20*log(rms(Vout)/rms(Vripple)). Vripple is the surimposed sinus signal to Vcc @ f = 217Hz
TS4902
Fig. 1 : Open Loop Frequency Response
Fig. 3 : Open Loop Frequency Response
Fig. 5 : Open Loop Frequency Response
Fig. 2 : Open Loop Frequency Response
Fig. 4 : Open Loop Frequency Response
Fig. 6 : Open Loop Frequency Response
TS4902
Fig. 7 : Open Loop Frequency Response
Fig. 9 : Open Loop Frequency Response
Fig. 8 : Open Loop Frequency Response
TS4902
Fig. 10 : Power Supply Rejection Ratio (PSRR)
vs Power supply
Fig. 12 : Power Supply Rejection Ratio (PSRR)
vs Bypass Capacitor
Fig. 14 : Power Supply Rejection Ratio (PSRR)
vs Feedback Resistor
Fig. 11 : Power Supply Rejection Ratio (PSRR)
vs Feedback Capacitor
Fig. 13 : Power Supply Rejection Ratio (PSRR)
vs Input Capacitor
TS4902
Fig. 15 : Pout @ THD + N = 1% vs Supply
Voltage vs RL
Fig. 17 : Power Dissipation vs Pout
Fig. 19 : Power Dissipation vs Pout
Fig. 16 : Pout @ THD + N = 10% vs Supply
Voltage vs RL
Fig. 18 : Power Dissipation vs Pout
Fig. 20 : Power Derating Curves
TS4902
Fig. 21 : Output Power vs Load Resistance
Fig. 23 : Clipping Voltage vs Supply Voltage
Fig. 25 : Noise Floor
Fig. 22 : Output Power vs Load Resistance
Fig. 24 : Frequency response vs Cin & Cfeed
TS4902
Fig. 26 : THD + N vs Output Power
Fig. 28 : THD + N vs Output Power
Fig. 30 : THD + N vs Output Power
Fig. 27 : THD + N vs Output Power
Fig. 29 : THD + N vs Output Power
Fig. 31 : THD + N vs Output Power
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