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TPIC6596NTIN/a5avai8-Bit Shift Register


TPIC6596N ,8-Bit Shift Register     SLIS096A − APRIL 2000 − REVISED MAY 2005DW OR N PACKAGE Low r . ..
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TS3USB30ERSWR ,High-Speed USB 2.0 1:2 Mux/Demux Switch With Single Enable and ESD Protection 10-UQFN -40 to 85Features 3 DescriptionThe TS3USB30E is a high-bandwidth 1:2 switch1• V Operation at 3 V to 4.3 VCCs ..
TS3USB30RSWR ,High-Speed USB 2.0 (480 Mbps) 1:2 Multiplexer/Demultiplexer Switch With Single Enable 10-UQFN -40 to 85Features 3 DescriptionThe TS3USB30 is a high-bandwidth switch specially1• V Operation at 3 V and 4. ..
TS3USB31RSER ,High-Speed USB 2.0 (480-Mbps) 1-Port Switch With Single Enable 8-UQFN -40 to 85Features 3 DescriptionThe TS3USB31 is a 1:1 SPST high-bandwidth switch1• V Operation at 3 V and 4.3 ..
TS3USB3200RSVR ,USB 2.0 High-Speed and Mobile High-Definition Link Switch w/ ID Select and Flexible Power Control 16-UQFN -40 to 85Featurescontrol. These configurations allow the systemdesigner to use a common USB or Mico-USB– Fle ..
TS3V330D ,Quad SPDT Wide Bandwidth Video Switch with Low On-State ResistanceSCDS162C–MAY 2004–REVISED JULY 2005PARAMETER DEFINITIONSPARAMETER DESCRIPTIONR Resistance between t ..
TS3V330DGVR ,Quad SPDT Wide Bandwidth Video Switch with Low On-State ResistanceFEATURESD, DBQ, DGV, OR PW PACKAGE• Low Differential Gain and Phase (D = 0.82%,G (TOP VIEW)D = 0.1 ..


TPIC6596N
8-Bit Shift Register
1.5-A Pulsed Current Per Output Output Clamp Voltage at 45 V Enhanced Cascading for Multiple Stages All Registers Cleared With Single Input Low Power Consumption
description

The TPIC6596 is a monolithic, high-voltage, high-
current power 8-bit shift register designed for use
in systems that require relatively high load power.
The device contains a built-in voltage clamp on
the outputs for inductive transient protection.
Power driver applications include relays, sole-
noids, and other medium-current or high-voltage
loads.
This device contains an 8-bit serial-in, parallel-out
shift register that feeds an 8-bit D-type storage
register. Data transfers through both the shift and
storage registers on the rising edge of the
shift-register clock (SRCK) and the register clock
(RCK) respectively. The storage register transfers
data to the output buffer when shift-register clear
(SRCLR) is high. When SRCLR is low, all
registers in the device are cleared. When output
enable (G) is held high, all data in the output
buffers is held low and all drain outputs are off.
When G is held low, data from the storage register
is transparent to the output buffers. The serial
output (SER OUT) is clocked out of the device on
the falling edge of SRCK to provide additional hold time for cascaded applications. This will provide improved
performance for applications where clock signals may be skewed, devices are not located near one another,
or the system must tolerate electromagnetic interference.
Outputs are low-side, open-drain DMOS transistors with output ratings of 45 V and 250-mA continuous sink
current capability. When data in the output buffers is low, the DMOS-transistor outputs are off. When data is
high, the DMOS-transistor outputs have sink current capability.
Separate power and logic level ground pins are provided to facilitate maximum system flexibility. Pins 1, 10, 11,
and 20 are internally connected, and each pin must be externally connected to the power system ground in order
to minimize parasitic inductance. A single-point connection between pin 19, logic ground (LGND), and pins 1,
10, 11, and 20, power grounds (PGND), must be externally made in a manner that reduces crosstalk between
the logic and load circuits.
The TPIC6596 is characterized for operation over the operating case temperature range of −40°C to 125°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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