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TMS320C6205DGHK200TIN/a131avaiFixed-Point Digital Signal Processor
TMS320C6205GHK200TIN/a17avaiFixed-Point Digital Signal Processor


TMS320C6205DGHK200 ,Fixed-Point Digital Signal ProcessorFeatures− PCI Interrupt Request Under DSP− Byte-Addressable (8-, 16-, 32-Bit Data)Program Control ..
TMS320C6205GHK200 ,Fixed-Point Digital Signal Processorblock diagram . . . . . . . . . 7asynchronous memory timing . . . . . . . . . . . . . . . . . . . . ..
TMS320C6211BGFN150 ,Fixed-Point Digital Signal ProcessorFeatures− Up to 256 Channels Each− Byte-Addressable (8-, 16-, 32-Bit Data)− AC97-Compatible− 8- ..
TMS320C6211BGFN180 ,Fixed-Point Digital Signal Processor 256-BGA maximum ratings over operating casetemperature range . . . . . . . . . . . . . . . . . . . . . . . ..
TMS320C6211BZFN167 ,Fixed-Point Digital Signal Processor 256-BGA      SPRS073L − AUGUST 1998 − REVISED JUNE 2005 ..
TMS320C6410GTS400 ,Fixed-Point Digital Signal ProcessorFunctional Description for 11 to “EMIFA 8−bit ROM boot”55 Device Configurations, Device Status Regi ..
TPS51116RGERG4 ,DDR1, DDR2, DDR3 Switcher and LDO 24-VQFN -40 to 85Maximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITVBS ..
TPS51116RGETG4 ,DDR1, DDR2, DDR3 Switcher and LDO 24-VQFN -40 to 85 SLUS609J–MAY 2004–REVISED JANUARY 20186 Pin Configuration and FunctionsRGE Package24-Pin QFNTop Vi ..
TPS51117 ,1.8V to 28V Input Sync. Step Down Controller with DCAP?Mode, Optimized for Light Load EfficiencyMaximum RatingsMIN MAX UNITVBST –0.3 36VBST (with respect to LL) –0.3 6Input voltage EN_PSV, TRIP, ..
TPS51117PW ,1.8V to 28V Input Sync. Step Down Controller with DCAP? Mode, Optimized for Light Load Efficiency 14-TSSOP -40 to 85Maximum Ratings . 410.3 Thermal Considerations.... 226.2 Recommended Operating Conditions..... 411 ..
TPS51117PWR ,1.8V to 28V Input Sync. Step Down Controller with DCAP? Mode, Optimized for Light Load Efficiency 14-TSSOP -40 to 85Features... 18.2 Typical Application..... 162 Applications..... 18.3 System Examples...... 203 Desc ..
TPS51117PWRG4 ,1.8V to 28V Input Sync. Step Down Controller with DCAP? Mode, Optimized for Light Load Efficiency 14-TSSOP -40 to 85Electrical Characteristics....... 511.1 Device Support 236.4 Typical Characteristics. 711.2 Communi ..


TMS320C6205DGHK200-TMS320C6205GHK200
Fixed-Point Digital Signal Processor
− 1600 MIPS VelociTI Advanced-Very-Long-Instruction-
Word (VLIW) TMS320C62x DSP Core
− Eight Highly Independent Functional
Units:
− Six ALUs (32-/40-Bit)
− Two 16-Bit Multipliers (32-Bit Result)
− Load-Store Architecture With 32 32-Bit
General-Purpose Registers
− Instruction Packing Reduces Code Size
− All Instructions Conditional
Instruction Set Features
− Byte-Addressable (8-, 16-, 32-Bit Data)
− 8-Bit Overflow Protection
− Saturation
− Bit-Field Extract, Set, Clear
− Bit-Counting
− Normalization
1M-Bit On-Chip SRAM
− 512K-Bit Internal Program/Cache
(16K 32-Bit Instructions)
− 512K-Bit Dual-Access Internal Data
(64K Bytes)
− Organized as Two 32K-Byte Blocks for
Improved Concurrency
32-Bit External Memory Interface (EMIF)
− Glueless Interface to Synchronous
Memories: SDRAM or SBSRAM
− Glueless Interface to Asynchronous
Memories: SRAM and EPROM
− 52M-Byte Addressable External Memory
Space
Four-Channel Bootloading
Direct-Memory-Access (DMA) Controller
With an Auxiliary Channel
Flexible Phase-Locked-Loop (PLL) Clock
Generator
Meets Requirements of PC99
− PCI Access to All On-Chip RAM,
Peripherals, and External Memory
(via EMIF)
− Four 8-Deep x 32-Wide FIFOs for
Efficient PCI Bus Data Transfer
− 3.3/5-V PCI Operation
− Three PCI Bus Address Registers:
Prefetchable Memory
Non-Prefetchable Memory I/O
− Supports 4-Wire Serial EEPROM
Interface
− PCI Interrupt Request Under DSP
Program Control
− DSP Interrupt Via PCI I/O Cycle
Two Multichannel Buffered Serial Ports
(McBSPs)
− Direct Interface to T1/E1, MVIP, SCSA
Framers
− ST-Bus-Switching Compatible
− Up to 256 Channels Each
− AC97-Compatible
− Serial-Peripheral-Interface (SPI)
Compatible (Motorola)
Two 32-Bit General-Purpose Timers IEEE-1149.1 (JTAG†)
Boundary-Scan-Compatible
288-Pin MicroStar BGA Package
(GHK and ZHK Suffixes)
0.15-µm/5-Level Metal Process
− CMOS Technology
3.3-V I/Os, 1.5-V Internal, 5-V Voltage
Tolerance for PCI I/O Pins


Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
VelociTI, TMS320C62x, and MicroStar BGA are trademarks of Texas Instruments.
Motorola is a trademark of Motorola, Inc. †IEEE Standard 1149.1-1990 Standard-Test-Access Port and Boundary Scan Architecture.
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