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TLE6209RLNFINEONN/a6500avaiSmart Motorbridges + Driver ICs


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TLE6209R
Smart Motorbridges + Driver ICs
A H-Bridge for DC-Motor ApplicationsData Sheet
TLE6209R
1Overview
1.1Features
Delivers up to 6 A continuous and 7 A peak currentOptimized for DC motor management applications
Very low RDSON of typ. 150 mΩ @25°C per switchOperates at supply voltages of up to 40VOvervoltage Protection against transients up to 45 VOutputs fully short circuit protectedStandard SPI-Interface, daisy chain capabilityAdjustable chopper current regulation of up to 7 ATemperature monitor with prewarning, warning and shutdownOver- and Undervoltage-LockoutOpen load detectionDetailed load failure diagnosis by SPIMinimized power dissipation due to active free-wheelingLow EMI due to voltage slope regulationVery low current consumption (typ. 20 µA @25°C) in stand-by (Inhibit) modeEnhanced power P-DSO-Package
Functional Description

The TLE6209R is an integrated power H-Bridge with D-MOS output stages for driving
bidirectional loads such as DC-Motors. The design is based on Infineons Smart Power
Technology SPT which allows bipolar, CMOS and power D-MOS devices on the same
monolithic circuit.
Operation modes forward (cw), reverse (ccw) and brake are invoked by two control pins
PWM and DIR. Protection and a reliable diagnosis of overcurrent, openload, short-circuit
to ground, to the supply voltage or across the load are integrated. Detailed diagnostic
information is given via the 8bit SPI status word. An integrated chopper current limitation
limits the current e.g. to reduce power dissipation during mechanical block of a DC
motor. Several device parameters can be set by the SPI control word. A three-level
temperature monitoring with prewarning, warning and shutdown is included for
controlled operation under critical power loss conditions. The full protection and
diagnosis capability make the device suitable especially for safety relevant applications,
e.g. in automotive ECUs.
1.2Pin Configuration

(top view)
Pin Definitions and Functions
1.2.1Pin Definitions and Functions
1.3Functional Block Diagram
Figure1Block Diagram
1.2.1Pin Definitions and Functions (cont’d)
Circuit Description2.1Serial Peripheral Interface (SPI)
The SPI is used for bidirectional communication with a control unit. The 8-bit
programming word or control word (see Table1) is read in via the SDI serial data input,
and this is synchronized with the serial clock input SCLK. The status word appears
synchronously at the SDO serial data output (see Table4).
The transmission cycle begins when the chip is selected with the chip-select-not (CSN)
input (H to L). When the CSN input changes from L to H, the word which has been read
into the shift register becomes the control word. The SDO output switches then to tristate
status, thereby releasing the SDO bus circuit for other uses. The SPI allows to parallel
multiple SPI devices by using multiple CSN lines. Due to the full duplex shift register, the
TLE6209R can also be used in daisy-chain configuration.
The settings made by the SPI control word become active at the end of the SPI
transmission and remain valid until a different control word is transmitted or a power on
reset occurs. At each SPI transmission, the diagnosis bits as currently valid in the error
logic are transmitted. The behavior of the diagnosis bits is described in Section2.5.
Table1Input Data Protocol
Table2Programmable Chopper Current Limit IL_xx
Note:For actual values, see page16
Table3Programmable Chopper OFF-time t
OFF_xx
Note:For actual values, see page16
Table4Diagnosis Data Protocol
Table5Temperature Monitoring
2.2Supply
2.2.1Logic Supply Voltage, Power-On-Reset

The logic is supplied with 5V by the VCC pin, separated from the power stage supply VS.
The advantage of this system is that information stored in the logic remains intact even
in the event of failures in the supply voltage VS. The power supply failure information can
be read out via the SPI. If VCC falls below typically 4.5V, the logic is shut down, all
internally stored data is deleted and the Output Stages are switched to tristate. The IC is
restarted on rising VCC with a hysteresis of typically 80mV
After this restart at increasing VCC, or if the device is activated after having been set into
inhibit mode (INH L to H), the IC is initialized by Power-On-Reset (POR). After POR, all
SPI control bits are set to L. This setting remains valid until first SPI communication. Also
the error bits are reset by POR.
2.2.2Power Supply Voltage

The power stages are connected to the supply voltage VS. This voltage is monitored by
over voltage (OV) and under voltage (UV) comparators as described in Section2.5.6.
The power supply voltage needs a blocking capacitor to GND.
2.3Direct Inputs
2.3.1Inhibit (sleep mode)

The INH input can be used to cut off the complete IC. By pulling the INH input to low, the
power stages are switched to tristate, and the current consumption is reduced to just a
few µA at both the VS and the VCC input. It also leads to the loss of any data stored. The
TLE6209R is reinitialized with POR if INH is put to high again. The pin has an internal
pull-down.
2.3.2Disable

The DIS input can be used to disable the output stages. By pulling the DIS input to high
the power stages are switched to tristate, regardless of the signals at the DIR and PWM
inputs. The DIS input can be used as an emergency disable without resetting the SPI
data stored in the IC. It has an internal pull-up.
Table5Temperature Monitoring
2.3.3Direction and PWM
The power stages are controlled by the direct inputs DIR and PWM as given in Table6
and further illustrated in Figure2. The DIR input gives the direction of output current,
while the PWM input controls whether the current is increased or reduced. The SPI
control bit 2 sets the decay mode, i.e. determines what happens if PWM = L. In pulse-
width modulated applications, this control scheme allows to supply the PWM-signal
always through the same port, using less controller resources.
Figure2DIR/PWM Control with Slow- and Fast Decay
Table6Functional Truth Table
2.4Power Stages
The output stages consist of a DMOS H-bridge built by two highside switches and two
lowside switches. Integrated circuits protect the outputs against overcurrent and
overtemperature if there is a short-circuit to ground or to the supply voltage or across the
load. Positive and negative voltage spikes, which occur when switching inductive loads,
are limited by integrated freewheeling diodes.
2.4.1Charge Pump

To realize the fast switching times, the charge pump, which generates the voltage
necessary to switch on the n-channel D-MOS high-side switches, must be highly
efficient. It requires an external capacitor CDRV which is connected to VS and the charge
pump buffer input, DRV. It should be placed as close to the pins as possible.
2.4.2Chopper Current Limitation

To limit the output current, a chopper current limitation is integrated as shown in
Figure3. The current is measured by sense cells integrated in the low-side switches. As

soon the current limit IL is reached, the low-side switch is switched off for a fixed timeOFF. IL and tOFF can be set by the SPI control bits 0,1, 3 and 4.
Figure3Chopper current limitation
2.4.3Active Freewheeling

When drivng inductive loads with PWM operation, the dissipated power can be
significantly reduced by activating the transistor located parallel to the internal
freewheeling diode. This is realized in the TLE6209R. When switching an output from
L to H, the high-side switch is turned on after a certain dead-time to avoid cross currents
flowing through the half bridge.
2.5Protection and Diagnosis
2.5.1Short of Output to Ground

The high-side switches are protected against a short of the output to ground by an over
current shutdown. If a high-side switch is turned on and the current rises above the high-
side shutdown threshold ISDH for longer than the shutdown delay time tdOC, all output
transistors are turned off and bit 4 the SPI diagnosis word is set. During the delay time,
the current is limited to ISC (typically 20A). The output stages stay off and the error bit
set until a status register reset (bit 7 of SPI control word) is received or a power-on reset
is performed.
2.5.2Short of Output to VS

Due to the chopper current regulation, the low-side switches are protected against a
short to the supply voltage. To detect the short, the first time the current limit is reached,
the off-command for the low-side switch is blanked out for 10µs. If the current rises
above the low-side shutdown threshold ISDL during this time, all output transistors are
turned off and bit 5 in the SPI diagnosis word is set. The value of the shutdown threshold
depends on the current limit that is set via the SPI. The shutdown threshold is 1A higher
than the current limit. The output stages stay off and the error bit set until a status register
reset (bit 7 of SPI control word) is received or a power-on reset is performed.
2.5.3Short Across the Load

The short circuit protection circuits of the high- and low-side switches work
independently of each other. In most cases, a short across the load will be detected as
a short to VS because of the longer filter time in the high-side switches tdOC and the higher
shutdown threshold ISDH.
2.5.4Open Load

If the current through the low side transistor is lower than the reference current IdOL in
ON-state (PWM = H), a timer is started. After a filter time tdOC an open load failure will be
recognized and the status bit 3 is set. If the current exceeds the reference current IdOL
the open load timer is reset. If the H-bridge is switched to OFF-state (PWM = L) the timer
is stopped but not reset. The timer continues if the H-bridge is switched to ON-state
again. There is no reset of the open load timer if the direction is changed using the DIR
input in open load condition. The open load error bit is latched and can be reset by the
status register reset bit 7 of the SPI control word or a POR.
2.5.5Temperature Monitoring

Temperature sensors are integrated in the power stages. The temperature monitoring
circuit compares the measured temperature to the prewarning, warning and shutdown
thresholds. As soon as a threshold is reached, the according status bits are set in the
SPI diagnosis word (c.f. Table5). If the overtemperature shutdown threshold is reached,
the output stages are turned off. The temperature monitoring messages and the over
temperature shutdown are latched and can be reset by the status register reset bit 7 of
the SPI control word or a POR.
2.5.6Power Supply Fail

The power supply Voltage is monitored for over- and under voltage lockout:Under Voltage Lockout
If the supply voltage VS drops below the switch off voltage VUVOFF, all output
transistors are switched off and the power supply fail bit (bit7 of the SPI diagnosis
word) is set. If VS rises again and reaches the switch on voltage VUVON, the power
stages are restarted. The error bit, however, is latched and has to be reset by the
status register reset bit 7 of the SPI control word.Over Voltage Lockout
If the supply voltage VS rises above the switch off voltage VOVOFF, all output transistors
are switched off and the power supply fail bit (bit7 of the SPI diagnosis word) is set.
If VS falls again and reaches the switch on voltage VOVON, the power stages are
restarted. The error bit, however, is latched and has to be reset by the status register
reset bit 7 of the SPI control word.
The OVLO is only active if control bit 6 is H. If the bit is low, the OVLO is deactivated.
2.5.7Error Flag

Bit 0 of the SPI diagnosis word is an OR of the status bits 1 to 7. It can be read out without
full SPI communication as described in Figure8.
CharacteristicsNote:Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
3.1Absolute Maximum Ratings
Voltages
Currents
Temperatures
3.2Operating Range
Thermal Resistances
3.3Electrical Characteristics
8 V < VS < 40 V; 4.75 V < VCC < 5.25 V; INH = High; all outputs open;
– 40 °C < Tj < 150 °C; unless otherwise specified
Current Consumption
Over- and Under-Voltage Lockout
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