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Partno Mfg Dc Qty AvailableDescript
TL16C550CTIN/a250avaiSingle UART with 16-Byte FIFOs & Auto Flow Control
TL16C550CFNTEXASN/a29avaiASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL
TL16C550CFNG4TI/BBN/a19avaiSingle UART with 16-Byte FIFOs and Auto Flow Control 44-PLCC 0 to 70
TL16C550CFNRTEXAS ?N/a500avai SINGLE UART WITH 16-BYTE FIFOS & AUTO FLOW CONTROL
TL16C550CIFNTIN/a1638avaiASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL
TL16C550CIFNRTIN/a1910avaiSingle UART with 16-Byte FIFOs and Auto Flow Control 44-PLCC -40 to 85
TL16C550CIPTTIN/a1000avaiASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL
TL16C550CIPTG4TEXASN/a81avaiSingle UART with 16-Byte FIFOs and Auto Flow Control 48-LQFP -40 to 85
TL16C550CIPTRTIN/a6000avaiSingle UART with 16-Byte FIFOs and Auto Flow Control 48-LQFP -40 to 85
TL16C550CNTIN/a400avaiASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL
TL16C550CPFBTIN/a122avaiASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL
TL16C550CPFBRTIN/a4043avai SINGLE UART WITH 16-BYTE FIFOS & AUTO FLOW CONTROL
TL16C550CPTTIN/a10000avaiASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL
TL16C550CPTG4TIN/a35avaiSingle UART with 16-Byte FIFOs and Auto Flow Control 48-LQFP 0 to 70
TL16C550CPTG4TEXASN/a1318avaiSingle UART with 16-Byte FIFOs and Auto Flow Control 48-LQFP 0 to 70
TL16C550CPTRTIN/a1706avai SINGLE UART WITH 16-BYTE FIFOS & AUTO FLOW CONTROL
TL16C550CPTRG4TIN/a1111avaiSingle UART with 16-Byte FIFOs and Auto Flow Control 48-LQFP 0 to 70


TL16C550CPTG4 ,Single UART with 16-Byte FIFOs and Auto Flow Control 48-LQFP 0 to 70          SLLS177H − MARCH 1994 − REVIS ..
TL16C550CPTG4 ,Single UART with 16-Byte FIFOs and Auto Flow Control 48-LQFP 0 to 70          SLLS177H − MARCH 1994 − REVIS ..
TL16C550CPTR , SINGLE UART WITH 16-BYTE FIFOS & AUTO FLOW CONTROL          SLLS177H − MARCH 1994 − REVIS ..
TL16C550CPTRG4 ,Single UART with 16-Byte FIFOs and Auto Flow Control 48-LQFP 0 to 70          SLLS177H − MARCH 1994 − REVIS ..
TL16C550DIPFB ,ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROLFEATURES• Programmable Auto-RTS and Auto-CTS • Standard Asynchronous Communication Bits(Start, Stop ..
TL16C550DIPT ,Asynchronous Communications Element ((16-Byte Fifos, Autoflow Control)block diagram) andis linked to the programmed receiver FIFO trigger level. When the receiver FIFO l ..
TLV272CDGKR ,550-uA/Ch 3-MHz Rail-to-Rail Output Operational AmplifierMaximum Ratings........ 6• Deleted Dissipation Ratings table ... 7• Deleted Macromodel Information. ..
TLV272CDR ,550-uA/Ch 3-MHz Rail-to-Rail Output Operational AmplifierElectrical Characteristics: Noise/Distortion12.6 Electrostatic Discharge Caution. 23Performance.... ..
TLV272CDRG4 ,550-uA/Ch 3-MHz Rail-to-Rail Output Operational Amplifier 8-SOIC 0 to 70Sample & Support &Product Tools &TechnicalCommunityBuyFolder Documents SoftwareTLV271,TLV272,TLV274 ..
TLV272ID ,550-uA/Ch 3-MHz Rail-to-Rail Output Operational Amplifier SLOS351E–FEBRUARY 2004–REVISED NOVEMBER 20165 Device Comparison TableSINGLES/(1)DEVICE V (V) V (μV ..
TLV272IDGK ,550-uA/Ch 3-MHz Rail-to-Rail Output Operational AmplifierElectrical Characteristics: Noise/Distortion12.6 Electrostatic Discharge Caution. 23Performance.... ..
TLV272IDGKR ,550-uA/Ch 3-MHz Rail-to-Rail Output Operational Amplifier SLOS351E–FEBRUARY 2004–REVISED NOVEMBER 20165 Device Comparison TableSINGLES/(1)DEVICE V (V) V (μV ..


TL16C550C-TL16C550CFN-TL16C550CFNG4-TL16C550CFNR-TL16C550CIFN-TL16C550CIFNR-TL16C550CIPT-TL16C550CIPTG4-TL16C550CIPTR-TL16C550CN-TL16C550CPFB-TL16C550CPFBR-TL16C550CPT-TL16C550CPTG4-TL16C550CPTR-TL16C550CPTRG4
Single UART with 16-Byte FIFOs & Auto Flow Control
Serial and Modem Control Outputs Drive aRJ11 Cable Directly When Equipment Is on
the Same Power Drop
Capable of Running With All Existing
TL16C450 Software
After Reset, All Registers Are Identical to
the TL16C450 Register Set
Up to 16-MHz Clock Rate for up to 1-Mbaud
Operation
In the TL16C450 Mode, Hold and Shift
Registers Eliminate the Need for Precise
Synchronization Between the CPU and
Serial Data
Programmable Baud Rate Generator Allows
Division of Any Input Reference Clock by 1
to (216 −1) and Generates an Internal 16×
Clock
Standard Asynchronous Communication
Bits (Start, Stop, and Parity) Added to or
Deleted From the Serial Data Stream
Characteristics:
− 5-, 6-, 7-, or 8-Bit Characters
− Even-, Odd-, or No-Parity Bit Generation
and Detection
− 1-, 1 1/2-, or 2-Stop Bit Generation
− Baud Generation (dc to 1 Mbit/s)
False-Start Bit Detection Complete Status Reporting Capabilities 3-State Output TTL Drive Capabilities for
Bidirectional Data Bus and Control Bus
Line Break Generation and Detection Internal Diagnostic Capabilities:
− Loopback Controls for Communications
Link Fault Isolation
− Break, Parity, Overrun, and Framing
Error Simulation
Fully Prioritized Interrupt System Controls Modem Control Functions (CTS, RTS, DSR,
DTR, RI, and DCD)


description

The TL16C550C and the TL16C550CI are functional upgrades of the TL16C550B asynchronous
communications element (ACE), which in turn is a functional upgrade of the TL16C450. Functionally equivalent
to the TL16C450 on power up (character or TL16C450 mode), the TL16C550C and the TL16C550CI, like the
TL16C550B, can be placed in an alternate FIFO mode. This relieves the CPU of excessive software overhead
by buffering received and transmitted characters. The receiver and transmitter FIFOs store up to 16 bytes
including three additional bits of error status per byte for the receiver FIFO. In the FIFO mode, there is a
selectable autoflow control feature that can significantly reduce software overload and increase system
efficiency by automatically controlling serial data flow using RTS output and CTS input signals.
The TL16C550C and TL16C550CI perform serial-to-parallel conversions on data received from a peripheral
device or modem and parallel-to-serial conversion on data received from its CPU. The CPU can read the ACE
status at any time. The ACE includes complete modem control capability and a processor interrupt system that
can be tailored to minimize software management of the communications link.
Both the TL16C550C and the TL16C550CI ACE include a programmable baud rate generator capable of
dividing a reference clock by divisors from 1 to 65535 and producing a 16× reference clock for the internal
transmitter logic. Provisions are included to use this 16× clock for the receiver logic. The ACE accommodates
a 1-Mbaud serial rate (16-MHz input clock) so that a bit time is 1 µs and a typical character time is 10 µs (start
bit, 8 data bits, stop bit).
Two of the TL16C450 terminal functions on the TL16C550C and the TL16C550CI have been changed to
TXRDY and RXRDY, which provide signaling to a DMA controller.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
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