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TL072BIDTSTN/a5200avaiJFET inputs, low input bias current
TL072BIYDTSTN/a5200avaiJFET inputs, low input bias current


TL072BIDT ,JFET inputs, low input bias currentAbsolute maximum ratings Symbol Parameter TL072I, AI, BI TL072C, AC, Unit BC (1)V Supply voltage ± ..
TL072BIYDT ,JFET inputs, low input bias currentFeatures +• Wide common-mode (up to V ) and CCdifferential voltage range D• Low input bias and off ..
TL072C ,LOW NOISE DUAL JFET OP-AMPSTL072TL072A - TL072B LOW NOISE J-FET DUAL OPERATIONAL AMPLIFIERS+. WIDE COMMON-MODE (UP TO V )ANDC ..
TL072C. ,LOW NOISE DUAL JFET OP-AMPSTL072TL072A - TL072B LOW NOISE J-FET DUAL OPERATIONAL AMPLIFIERS+. WIDE COMMON-MODE (UP TO V )ANDC ..
TL072CD ,LOW NOISE, JFET INPUT OPERATIONAL AMPLIFIERSTL072TL072A - TL072BLOW NOISE J-FET DUAL OPERATIONAL AMPLIFIERS+ ■ WIDE COMMON-MODE (UP TO V ) AND ..
TL072CDG4 ,Dual Low-Noise JFET-Input General-Purpose Operational Amplifier 8-SOIC 0 to 70Features 3 DescriptionThe TL07xx JFET-input operational amplifiers1• Low Power Consumptionincorpora ..
TLV2211CDBVTG4 ,Single LinCMOS(TM) Rail-To-Rail uPower Operational Amplifier
TLV2217-18KTPR ,18Block Diagram..... 74 Revision HistoryChanges from Revision L (April 2005) to Revision M Page• Adde ..
TLV2217-25 , LOW-DROPOUT FIXED-VOLTAGE REGULATOES
TLV2217-25PWR ,18Maximum Ratings(1)over operating free-air temperature range (unless otherwise noted)MIN MAX UNITCon ..
TLV2217-33 , LOW-DROPOUT 3.3-V FIXED-VOLTAGE REGULATORS
TLV2217-33 , LOW-DROPOUT 3.3-V FIXED-VOLTAGE REGULATORS


TL072BIDT-TL072BIYDT
JFET inputs, low input bias current
Features Wide common-mode (up to VCC+ ) and differential voltage range • Low input bias and offset current • Low noise en = 15 nV/√Hz (typ) Output short-circuit protection • High input impedance JFET input stage • Low harmonic distortion: 0.01 % (typical) • Internal frequency compensation • Latch-up free operation High slew rate: 16 V/µs (typ)
Related products
See TL071 for single op amp version See TL074 for quad op amp version
Description

The TL072, TL072A, and TL072B are high speed JFET input dual operational amplifiers incorporating well-matched, high-voltage JFET and bipolar transistors in a monolithic integrated circuit.
The devices feature high slew rates, low input bias and offset current, and low offset voltage temperature coefficients.
Contents Schematic diagram .......................................................................... 3 Absolute maximum ratings and operating conditions ................. 4 Electrical characteristics ................................................................ 5 Parameter measurement information .......................................... 10 Typical application ........................................................................ 11 Package information ..................................................................... 12
6.1 SO8 package information ................................................................ 12 Ordering information ..................................................................... 14 Revision history ............................................................................ 15
Schematic diagram Figure 1: Schematic diagram
Absolute maximum ratings and operating conditions Table 1: Absolute maximum ratings
Notes:

(1) All voltage values, except the differential voltage, are with respect to the zero reference level (ground) of the
supply voltages where the zero reference level is the midpoint between VCC+ and VCC-.
(2) The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 volts, whichever is less.
(3) Differential voltages are the non-inverting input terminal voltages with respect to the inverting input terminal.
(4) Short-circuits can cause excessive heating. Destructive dissipation can result from simultaneous short-circuits on all amplifiers.
(5) The output may be shorted to ground or to either supply. Temperature and/or supply voltages must be limited to ensure that the dissipation rating is not exceeded.
(6) Human body model: 100 pF discharged through a 1.5 kΩ resistor between two pins of the device. This is done for all couples of pin combinations with other pins floating.
(7) Machine model: a 200 pF cap is charged to the specified voltage, then discharged directly between two pins of the device with no external series resistor (internal resistor < 5 W). This is done for all couples of pin combinations with other pins floating.
(8) Charged device model: all pins plus package are charged together to the specified voltage and then discharged directly to the ground.
Table 2: Operating conditions

Electrical characteristics Table 3: Electrical characteristics at VCC = ±15 V, Tamb = +25 °C (unless otherwise specified).
Notes:
(1) The input bias currents are junction leakage currents which approximately double for every 10 °C increase in the junction temperature.


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