TEA6430 Fast Delivery |IC PHOENIX CO.,LIMITED

TEA6430 ,AUDIO CELLULAR MATRIXTEA6430AUDIO CELLULAR MATRIX.5 STEREO INPUTS - 4 STEREO OUTPUTS.3-STATE OPERATION FOR EACH OUTPUT.G ..
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TEA6430
AUDIO CELLULAR MATRIX
TEA6430
AUDIO CELLULAR MA TRIX
May 1996
GND
REFINININININ OUT OUT OUT OUT
VCC
SDA
SCL
SUBINININININ OUT OUT OUT OUT
6430-01.EPS
PIN CONNECTIONS
SHRINK24
(Plastic Package)
ORDER CODE: TEA6430 STEREO INPUTS-4 STEREO OUTPUTS. 3-STATE OPERATION FOR EACH OUTPUT.GAIN OUTPUT CONTROL
0dB/2/4/6dB/MUTE FOR EACH.VERY LOW NOISE AND DISTORTION.I2C BUS CONTROL.4 SUB-ADDRESS FACILITY.90dB CROSSTALK BETWEEN ANY INPUT
AND OUTPUT
DESCRIPTION
The TEA6430 switches5 stereo inputson4 stereo
outputs, providing the customer with high quality
sound (low noise, low distortion). The4 stereo
outputs can be set separatelyin high impedance
state,to enable parallel connectionof several de-
vices (upto4).All functions are controlledthrough
theI2C bus.
1/10
20 19 18 17 SUPPLY BUS DECODERRIGHT
OUTPUTS
LEFT
OUTPUTS
SDA
SCL
ADR
RIGHT INPUTS
LEFT INPUTS STATES
OUT
GND STATES
OUT STATES
OUT STATES
OUT STATES
OUT STATES
OUT STATES
OUT
GAIN 3 STATES
OUT
6430-02.EPS
The output loads havetobe larger than 2kΩ (typical 10kΩ) and 1500pF
BLOCK DIAGRAM
ABSOLUTE MAXIMUM RATINGS
Symbol Parameter Value Unit
VCC Supply Voltage 12 V Voltageat Pinito GND 0, VCC V
Toper Operating Ambient Temperature 0,+70 oC
Tstg Storage Temperature -20,+ 150 oC
6430-01.TBL
THERMAL DATA
Symbol Parameter Value Unit
Rth(j-a) Junction-ambient Thermal Resistance 75 o C/W
6430-02.TBL
TEA6430
2/10
ELECTRICAL CHARACTERISTICS
(VCC =8V, Tamb =25oC,RL= 10kΩ,RG= 600Ω,f= 1kHz,G= 0dB, VIN= 0.5VRMS;
3-stateis controlledbyI2C bus, unlessotherwise specified)
Symbol Parameter Test Conditions Min. Typ. Max. Unit
SUPPLY
VCC Supply Voltage 7.2 8 10.2 V
ICC Supply Current 4 7 10 mA Ripple Rejection VIN= 0.5VRMS,f= 1kHz 70 dB
AUDIO INPUTS
VIN Max. Signal Amplitude 2 VRMS
VDC Input DC Level VCC/2 V Input Resistance 30 50 100 kΩ
AUDIO OUTPUTS
ROUT Output Resistance 60 100 Ω
ZHI Output ”off” Impedance f= 20kHz, output disabled 50 kΩ
VOFF DC Offset Change Switching between inputs, see note1 0.1 5 mV
VOUT Output DC Level 0.4 VCC VCC/2 0.6 VCC V Output Noise Voltage B= 20-20kHz, flat, see note2 2.5 μV Gain B= 20-20kHz,RL =2kΩ -0.5 0 +0.5 dB
Isolation ”off” State f= 1kHz, output disabled 85 dB
THD Distortion VIN =1VRMS,f= 1kHz 0.01 0.05 %
VCL Clipping Level d= 0.3% 2 2.3 VRMS L,R Channel Separation f= 1kHz -85 dB
Crosstalk Audio Channelsf= 1kHz, see note3 -85 -100 dB Load Capacitance 1500 pF
Notes: 1.DC offsetchangeis less thanmaximum limit,in allconfigurations (oneor several devicesin parallel), provided thatthe
reference Pins (P2)areall connected together. Flatfilter accordingto CCIR-468-4,B= 20Hz-20kHz Measured fromany selected output which containsno signaltoasetof other outputs.
6430-03.TBL
TEA6430
3/10
2C BUS CHARACTERISTICSSymbol Parameter Test
Conditions
Standard Mode Fast Mode UnitMin. Max. Min. Max.
SCL
VIL Low Level Input Voltage -0.3 + 1.5 -0.3 +1.5 V
VIH High Level Input Voltage 3.0 VCC+0.5 3.0 VCC+0.5 V
ILI Input Leakage Current VI=0to VDD - 10+10 - 10+10 μA
fSCL Clock Frequency 0 100 0 400 kHz Input Rise Time 1.5Vto3V 1000 300 ns Input Fall Time 1.5Vto3V 300 300 ns Input Capacitance 10 10 pF
SDA
VIL Low Level Input Voltage -0.3 + 1.5 -0.3 +1.5 V
VIH High Level Input Voltage 3.0 VCC+0.5 3.0 VCC+0.5 V
ILI Input Leakage Current VI=0to VDD - 10+10 - 10+10 μA Input Capacitance 10 10 pF Input Rise Time 1.5Vto3V 1000 300 ns Input Fall Time 1.5Vto3V 300 300 ns
VOL Low Level Output Voltage IOL= 3mA 0.4 0.4 V Output Fall Time 3Vto 1.5V 250 250 ns Load Capacitance 400 400 pF
TIMING
tLOW Clock Low Period 4.7 1.3 ms
tHIGH Clock High Period 4.0 0.6 ms
tSU,DAT Data Set-upTime 250 100 ns
tHD,DAT Data Hold Time 0 340 0 340 ns
tSU,STO Set-up Time from Clock Highto Stop 4.0 0.6 μs
tBUF Start Set-up Time followinga Stop 4.7 1.3 μs
tHD,STA Start Hold Time 4.0 0.6 μs
tSU,STA Start Set-up Time
following Clock Low-to High Transition
4.7 0.6 μs
6430-04.TBL BUF t LOW HIGHfrt HD,STA t HD,DAT t SU,DAT SU,STA t SU,STO
SDA
SCL
SDA
6430-03.EPS
Figure1:I2C Bus Timing
TEA6430
4/10
2C BUS SELECTION2C Bus Slave AddressAddress A6 A5 A4 A3 A2 A1 A0 R/W
Value 1 001 1 A1 A0 0
Sub-addressI2C
Symbol Parameter Conditions Pin22 Voltage (typ.) Unit
Vsub Slave address HEXA Sub-address (see note)
GND
VCC
1/3
2/3
VCC
VCC
Note: The first3 levelsare definedby connectingthe sub-addresspintothe appropriate level. Sub-address4 willbe selectedwhen
thispinisleft open.
Data Byte b6 b5 b4 b3 b2 b1 b0 ActionT 01 00 G1 G0 I2I1I0
Input
Select
IN1
IN2
IN3
IN4
IN5
Mute
Output
Select
OUT1
OUT2
OUT3
OUT4
Gain
6dB
4dB
2dB
0dB
Tri-state 0
Low impedance
Tri-state
Example: 00111100 enables L(R)2 outand connectit witha gain of0dBto L(R)5in.
Power On Reset
When active: outputsin 3-state. All outputs are disabled and L(R)5is selectedto driveall outputs.
Gain= 0dB.
Symbol Parameter Conditions Min. Typ. Max. Unit
Reset Startof Reset
Endof Reset
Incr. VCC
Decr. VCC
Incr. VCC 4.5
TEA6430
5/10
9 10 11 12SUPPLY VOLTAGE(V)
SUPPLY
CURRENT
(mA) T =25°C
All outputs enabled
6430-04.EPS
Figure1: Supply Currentasa Functionof
SupplyVoltage 8 9 101112
SUPPLY VOLTAGE(V)
RIPPLE
REJECTION
(dB) Gain= 0dB = 600mVRMSIN 25°CA
6430-06.EPS
Figure3: Ripple Rejectionasa Functionof
SupplyVoltage
-20 0 20 40 60 80
TEMPERATURE (°C)
SUPPLY
CURRENT
(mA) V=8V
All outputsenabled
6430-05.EPS
Figure2: Supply Currentasa Functionof
Temperature
-20 0 20 40 60 80
TEMPERATURE (°C)
RIPPLE
REJECTION
(dB)8V
Gain= 0dB 1kHz
All outputs enabled85
6430-07.EPS
Figure4: Ripple Rejectionasa Functionof
Temperature
TYPICAL PERFORMANCES 246
GAIN (dB)
RIPPLE
REJECTION
(dB)8V =25°C = 600m VRMSIN
6430-08.EPS
Figure5: Ripple Rejectionasa Functionof
Gain
1.9 9 10 11 12
SUPPLY VOLTAGE(V)
3.5 T= 25°C
Distortion= 0.3%
Gain= 0dB
CLIPPING
LEVEL
RMS
6430-09.EPS
Figure6: Clipping Levelasa Functionof
Supply Voltage
TEA6430
6/10

Partno	Mfg	Dc	Qty	Available	Descript
TEA6430	ST ?	N/a	560	avai	AUDIO CELLULAR MATRIX
TEA6430	ST	N/a	40000	avai	AUDIO CELLULAR MATRIX