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TDA8205N/a20avaiNICAM QPSK demodulator


TDA8205 ,NICAM QPSK demodulatorTDA8205NICAM QPSK DEMODULATOR.HIGHLY INTEGRATED TWO CHIP SOLU-TION FOR NICAM DEMODULATION (usingTDA ..
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TDA8214 ,HORIZONTAL AND VERTICAL DEFLECTION CIRCUITELECTRICAL CHARACTERISTICS oVCC1 = 10V, TAMB = 25 C (unless otherwise specified )Symbol Parameter M ..
TDA8214B ,HORIZONTAL AND VERTICAL DEFLECTION CIRCUITABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV 1 Supply Voltage 30 VCCVCC2 Flyback Generator ..
TDA8214B ,HORIZONTAL AND VERTICAL DEFLECTION CIRCUITELECTRICAL CHARACTERISTICS (continued) oV = 10V, T = 25 C (unless otherwise specified )CC1 AMBSym ..
TDA8215B ,HORIZONTAL AND VERTICAL DEFLECTION CIRCUITFEATURES SUMMARY Figure 1. Package■ DIRECT LINE DARLINGTON DRIVE■ DIRECT FRAME-YOKE DRIVE (± 1A)■ C ..
TIBPAL16L8--10MJB ,High-Performance Impact-X<TM> PAL<R> Circuits 20-CDIP -55 to 125
TIBPAL16L8-15MJB ,High-Performance Impact<TM> PAL<R> Circuits 20-CDIP -55 to 125TIBPAL16L8-15M is Not Recommended for New DesignsTIBPAL16L8-15M, TIBPAL16R4-15M®HIGH-PERFORMANCE IM ..
TIBPAL16L8-15MJB ,High-Performance Impact<TM> PAL<R> Circuits 20-CDIP -55 to 125TIBPAL16L8-15M is Not Recommended for New DesignsTIBPAL16L8-15M, TIBPAL16R4-15M®HIGH-PERFORMANCE IM ..
TIBPAL16L8--15MJB ,High-Performance Impact<TM> PAL<R> Circuits 20-CDIP -55 to 125block diagrams (positive logic)TIBPAL16L8’& ≥1ENO732 X 64O716 x I/O710 16I7 I/OI/O76 16I/O7I/O7I/O7 ..
TIBPAL16L8-20MWB ,High-Performance Impact<TM> PAL<R> Circuits 20-CFP -55 to 125block diagrams (positive logic)TIBPAL16L8’≥ 1&ENO732 × 64O716 ×I/O710 16II/O77 I/O6 16I/O7I/O7I/O76 ..
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TDA8205
NICAM QPSK demodulator
TDA8205
NICAM QPSK DEMODULATOR
October 1993
PIN CONNECTIONS
HIGHLY INTEGRATED TWO CHIP SOLU-
TION FOR NICAM DEMODULATION (using
TDA8204 decoder). AUTOMATIC DUAL STANDARD DEMODULA-
TION 6.552MHz FOR I SYSTEM
5.85MHz FOR B/G SYSTEM. 40dB RANGE AGC. SINGLE CRYSTAL OPERATION. NICAM 728 DATA AND CLOCK RECOVERY. LOW PASS FILTER FOR PWM CODED
AUDIO SIGNALS AND J-17 DE-EMPHASIS. AUTOMATIC FM MONO SELECTION BY RE-
SERVE SOUND SWITCH FUNCTION. VERSATILE AUDIO SWITCHING MATRIX. AUTOMATIC MUTE FUNCTION
DESCRIPTION

The TDA8205 is essentially divided into two signal
processing sections. The first section handles all
the NICAM signal acquisition, the QPSK demodu-
lator and clock and data recovery circuits. The key
point to note about this section is the dual fre-
quency synthesiser. By use of only one quartz
crystal, the IC is able to demodulate QPSK signals
from either system I or system B/G in an automatic
way. The second section of the TDA8205 manages
the analog parts of the twin digital-to-analog con-
verters (DACs) and all filtering and audio switching
downstream of the DACs. A simple serial bus from
the TDA8204 allows control of the switch functions
by the CTV system microcontroller.
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PIN ASSIGMENT
BLOCK DIAGRAM
BLOCK DIAGRAM DESCRIPTION

The QPSK signal enters the IC via two inputs after
passing through two external bandpass filters at
the relevant frequencies of 6.552MHz and
5.85MHz for system I and B/G respectively. The
two inputs enter a source selection switch and pass
immediately to an AGC block which has a total
range of 40dB. The resulting levelled signal passes
to the QPSK demodulator which recovers the NI-
CAM 728Kb/s data stream by means of carrier and
clock recovery circuits.
Carrier recovery is achieved with a baseband re-
modulator which consists of a phase locked loop
with a switchable phase detector. This allows it to
lock to one of four possible phases of the QPSK
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carrier without disruption due to the modulation.
Dual frequency operation is made possible by syn-
thesising the carrier reference frequency thus sav-
ing the need for two extra crystals. Dual VCXO can
also be software selected (SYN bit of CR3 in
TDA8204) with external crystal (Pin XC1/XC2) for
new standards. Selection between XC1 and XC2
is done with bit "IBG" in CR3 register of TDA8204
(IBG = 0 XC1 selected, IBG = 1 XC2 selected).
The standards switch controls operation of the
QSPK demodulator at either 6.552MHz or
5.85MHz. This can be controlled via the I2 C bus or
the decoder set into automatic mode in which it
determines the standard by alternately trying to
lock to the two systems.
On chip low pass filters recover the in-phase and
quadrature data channels which are then sliced by
comparators. The symbol clock is recovered from
this data and used to sample and re-time it. The
two data channels are then decoded and serialized
to obtain the NICAM-728 data which is then passed
on to the NICAM decoder in the TDA8204.
After processing the NICAM into a digital bit-stream
in the TDA8204, the data is passed back to the
TDA8205 for the analog functions of the DACs to
be performed.
Conversion of the pulse width modulated bit
streams to analog takes place and is followed by
low pass filtering which removes high frequency
quantising noise and performs J-17 de-emphasis.
The DACs signal level can be adjusted to match
the reserve sound signal level.
1VRMS maximum on Pins LFIL1/RFIL1 can be ob-
tained by selection of appropriate resistor on
Pin RG.
Once the analog audio has been recovered, certain
source switch functions are performed. If the NI-
CAM signal fails and if the reserve sound flag (C4),
of SRO register, is set the reserve sound switch
automatically selects Mono Audio Input. If the re-
serve sound flag (C4) is reset, the reserve sound
switch will not change and the audio outputs will be
muted (DAC outputs muted).
If the NICAM signal only carries data, Mono Audio
Input is selected. The reserve sound switch can be
forced to select Mono Audio Input via I2 C bus, using
Bit FS0 = 1 and FS1 =0 of CR3 Register.
This can be used in the case of NICAM marginal
reception. To select Stereo Left and Right Audio
Input Bit FS0 = 0 and FS1 = 1 of CR3 Register must
be selected. The outputs from this reserve sound
switch are available on Audio mutable output left
and right, and are internaly connected to the audio
matrix.
A simple audio switching matrix is provided inter-
nally for flexible control over the audio source and
destination selection.
Audio signal left and right coming from the reserve
sound switch and the external audio input left and
right can be switched to the audio outputs left and
right .
DAC and auxiliary audio outputs can be muted. An
additional +6dB gain can be applied to raise the
output levels to 2VRMS maximum. For more infor-
mation see Software Specification chap-
ter (III.5.3/TDA8204).
The DAC outputs are automatically muted under
the following conditions loss of frame alignement the bit error rate (Ber) is > error rate limit NICAM signal is conveying M1 only. The right
DAC is muted unless M1 has been selected to be
on both DAC outputs. NICAM signal is conveying data only.
For test purposes, the DAC outputs can be un-
muted by forcing the bi-directional mute Pin 25 of
TDA8204 or via I2 C bus.
ABSOLUTE MAXIMUM RATINGS
THERMAL DATA
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ELECTRICAL CHARACTERISTICS (Tamb = 25o C, VCC = 12V , VDD = 5V, unless otherwise specified)
SUPPLY
DIGITAL PINS
ANALOG PINS
TDA8205

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ELECTRICAL CHARACTERISTICS (continued)
TDA8205

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APPLICATION DIAGRAMS
Figure 1 : Stand Alone Application (I standard)
TDA8205

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