TDA7529 ,RF front-end for AM/FM DSP car-radio with IF samplingAbsolute maximum ratings . . . . 194.2 Thermal data . . . . . . 194.3 General key paramet ..
TDA7535 ,DELTA/SIGMA CASCADE 20 BIT STEREO DACABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Power supplies Digital -0.5 to +4.6 VDDV Analo ..
TDA7535 ,DELTA/SIGMA CASCADE 20 BIT STEREO DACELECTRICAL CHARACTERISTICSSymbol Parameter Test Condition Min. Typ. Max. Unitl Low Level Input Curr ..
TDA7535 ,DELTA/SIGMA CASCADE 20 BIT STEREO DACTDA7535DELTA/SIGMA CASCADE 20 BIT STEREO DAC■ 20-bit resolution single ended output■ Analog reconst ..
TDA7535013TR ,DELTA/SIGMA CASCADE 20 BIT STEREO DACABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Power supplies Digital -0.5 to +4.6 VDDAnalog ..
TDA7540B ,Am/FM Tuner with Stereodecoder and IssFunctional description of the multipath-detector . . 304.3.4 Quality detector . . . 314.3. ..
THS4061IDR ,180-MHz High Output Drive Voltage-Feedback Amplifiermaximum ratings over operating free-air temperature (unless otherwise noted)Supply voltage, V + to ..
THS4061IDRG4 ,180-MHz High Output Drive Voltage-Feedback Amplifier 8-SOIC -40 to 85maximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
THS4062CD ,180-MHz High Output Drive Voltage-Feedback Amplifier, Dualmaximum ratings over operating free-air temperature (unless otherwise noted)Supply voltage, V + to ..
THS4062CDR ,180-MHz High Output Drive Voltage-Feedback Amplifier, Dualmaximum ratings over operating free-air temperature (unless otherwise noted)Supply voltage, V + to ..
THS4062CDRG4 ,180-MHz High Output Drive Voltage-Feedback Amplifier, Dual 8-SOIC maximum ratings” may cause permanent damage to the device. These are stress ratings only andfunctio ..
THS4062ID ,180-MHz High Output Drive Voltage-Feedback Amplifier, Dual SLOS234E − DECEMBER 1998 − REVISED DECEMBER 2003THS4061 ..
TDA7529
RF front-end for AM/FM DSP car-radio with IF sampling
TDA7529RF front-end for AM/FM DSP car-radio with IF sampling
Features Fully integrated VCO for world tuning High performance PLL for fast RDS system I/Q mixer for FM IF 10.7 MHz with image
rejection and integrated LNA I/Q mixer for AM IF 10.7 MHz up conversion
with high dynamic range Integrated balun, which allows saving of
external mixer tank RF AGC, IF AGC, DAGC Low noise IF amplifier with switched wide
dynamic AGC range IF switch for FM / AM / IBOC Electronic alignment for the preselection
stagesI2 C/SPI controlled Single 5 V supply Alternative frequency control signals to DSP
DescriptionThe front-end is a high performance tuner circuit
for AM/FM - DSP car-radios with 10.7 MHz IF
sampling. It contains mixer and IF amplifiers for
AM and FM, fully integrated VCO and PLL
synthesizer on a single chip. Use of BiCMOS
technology allows the implementation of several
tuning functions and a minimum of external
components.
Table 1. Device summary
Contents TDA7529
Contents Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Function description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 123.1 IMR mixer and active balun output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.2 FM RF-AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.3 AM RF-AGC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.4 IF AGC and IF amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.5 Dividers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.6 D/A converters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
3.7 VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.8 FREF . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.9 A/D converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.10 GPIO - general purpose IO interface pins . . . . . . . . . . . . . . . . . . . . . . . . 16
3.11 AFSAMPLE/AFHOLD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.12 Serial bus interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 194.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.3 General key parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.4 FM - section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.5 AM - section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.6 IF - section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
4.7 VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.8 Reference frequency input buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.9 Dividers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.10 Phase locked loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.11 Phase frequency detector and charge pump . . . . . . . . . . . . . . . . . . . . . . 25
4.12 Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.13 D/A-converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
TDA7529 Contents4.14 A/D-converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.15 GPIO – general purpose IO interface pins . . . . . . . . . . . . . . . . . . . . . . . . 27
4.16 AFSAMPLE / AFHOLD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.17 Serial data interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Tuning state machine . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 295.1 Tuning state machine modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1.1 Mode 000: buffer (nil) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1.2 Mode 001: preset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
5.1.3 Mode 010: search . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.1.4 Mode 011: AF update . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
5.1.5 Mode 100: jump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.2 Mode 100: check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
5.3 Mode 110: load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.4 Mode 111: end . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5.5 Register SWAP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
5.6 State machine start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Registers description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 356.1 Data byte specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.1.1 Short_reg (0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
6.1.2 ADCctrl (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
6.1.3 GPIO mode (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
6.1.4 AGC and mixer control (3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
6.1.5 Register (4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.1.6 Divider R (5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
6.1.7 IF AGC control (6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
6.1.8 FM AGC (7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
6.1.9 AGC voltage threshold (8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
6.1.10 Mixer alignment 1 (9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
6.1.11 Mixer alignment 2 (10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
6.1.12 PLL control 1 (11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
6.1.13 PLL control 2 (12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
6.1.14 PLL test (13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
6.1.15 Misc 2 (14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
6.1.16 Wait lock (15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Contents TDA75296.1.17 AGC time constant settings (16 / 32) . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
6.1.18 AMAGC control (17 / 33) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
6.1.19 GPIO output level control (18 / 34) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
6.1.20 IF control (19 / 35) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
6.1.21 AF state machine wait time 1 (20 / 36) . . . . . . . . . . . . . . . . . . . . . . . . . 51
6.1.22 PLL main divider (N-divider) 1 (21 / 37) . . . . . . . . . . . . . . . . . . . . . . . . . 51
6.1.23 PLL main divider (N-divider) 2 (22 / 38) . . . . . . . . . . . . . . . . . . . . . . . . . 51
6.1.24 PLL main divider (N-divider) 3 (23 / 39) . . . . . . . . . . . . . . . . . . . . . . . . . 52
6.1.25 PLL Divider ratio calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
6.1.26 VCO divider (V-divider) (24 / 40) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
6.1.27 Charge pump current (25 / 41) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.1.28 Tuning DAC 1 (26 / 42) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
6.1.29 Tuning DAC 2 (27 / 43) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.1.30 Different controls (28 / 44) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
6.1.31 Misc 3 (29 / 45) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
6.1.32 Analog test select (30 / 46) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
6.1.33 AD converter test (31 / 47) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
6.1.34 Read 1 (48) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
6.1.35 Read 2 (49) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58 Package information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
TDA7529 List of tables
List of tables
Table 1. Device summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Table 2. Pin assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Table 3. IF AGC and IF amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 4. Switching frequency as a function of the process. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 5. GPIO - general purpose IO interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 6. Supports data communication using the SPI and the I2 C protocol. . . . . . . . . . . . . . . . . . . 17
Table 7. I2 C addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 8. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 9. Thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 10. General key parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 11. FM - section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 12. AM - section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Table 13. IF - section . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Table 14. VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 15. Reference frequency input buffer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 16. Dividers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
Table 17. Phase Locked Loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 18. Phase frequency detector and charge pump . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Table 19. Temperature sensor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 20. D/A-converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 21. A/D-converter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Table 22. GPIO - general purpose IO interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 23. AFSAMPLE / AFHOLD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Table 24. Serial data interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 25. Values of the programmable wait times . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
Table 26. Registers description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Table 27. Short_reg (0). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 28. ADCctrl (1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Table 29. GPIO mode (2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
Table 30. AGC and mixer control (3 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
Table 31. Register (4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 32. Divider R (5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Table 33. IF AGC control (6). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
Table 34. FM AGC (7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43
Table 35. AGC voltage threshold (8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 36. Mixer alignment 1 (9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Table 37. Mixer alignment 2 (10) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
Table 38. PLL control 1 (11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 39. PLL control 2 (12) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
Table 40. PLL test (13) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 41. Misc 2 (14) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
Table 42. Wait lock (15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 43. AGC time constant settings (16 / 32) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
Table 44. AMAGC control (17 / 33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Table 45. GPIO output level control (18 / 34) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 46. IF control (19 / 35) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
Table 47. AF state machine wait time 1 (20 / 36) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 48. PLL main divider (N-divider) 1 (21 / 37) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
List of tables TDA7529
Table 49. PLL main divider (N-divider) 2 (22 / 38) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51
Table 50. PLL main divider (N-divider) 3 (23 / 39) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 51. PLL Divider ratio calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 52. VCO divider (V-divider) (24 / 40) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52
Table 53. Charge pump current (25 / 41) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 54. Tuning DAC 1 (26 / 42). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
Table 55. Tuning DAC 2 (27 / 43). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 56. Different controls (28 / 44) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
Table 57. Misc 3 (29 / 45). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 58. Analog test select (30 / 46). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55
Table 59. AD converter test (31 / 47) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 60. Read 1 (48). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
Table 61. Read 2 (49). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
Table 62. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
TDA7529 List of figures
List of figures
Figure 1. Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 2. Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Figure 3. Positive current diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Figure 4. Positive/negative current diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 5. Voltage and current mode with hand-over . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. I2 C (sub address mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 7. SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Figure 8. Preset timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 9. Search timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 10. AF update timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 11. Jump timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 12. Check timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 13. Load timing diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 14. End timing diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 15. Buffer/control serial bus sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 16. Application schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
Figure 17. LQFP64 (10x10x1.4mm) exposed pad down mechanical data and package dimensions . 59
Functional block diagram TDA7529 Functional block diagram
Figure 1. Functional block diagram
TDA7529 Pin description
2 Pin description
Figure 2. Pin connection
Table 2. Pin assignment
Pin description TDA7529
Table 2. Pin assignment (continued)
TDA7529 Pin description
Table 2. Pin assignment (continued)
Function description TDA7529
3 Function description
3.1 IMR mixer and active balun output
The IMR mixer has two FM inputs (referred as mode 1 / mode 2) and one AM input
selectable by software. The FM inputs differ by their gains, noise figures, IIP3 and maximum
signal handling capability. The mode 1 FM input (with the higher gain, lower IIP3 and lower
noise figure) is normally coupled with passive antenna input stages; the mode 2 FM input is
normally used for input stages featuring an external preamplifier.
There are two single ended outputs of the IMR mixer: Balunout1 has a 4 dB higher gain than
Balunout2. It is not recommended to use both outputs in parallel.
The Balun1 pin is the current mixer output over an internal resistor. The LC filter at Balun1
can be realized with a low cost SMD-coil (Q ~ 4).
3.2 FM RF-AGC
The FM AGC system is controlled by a peak detector, whose gain can be varied by the
keyed AGC. The latter function is meant to be controlled by a D/A converter in the back-end
part of the system.
The time constant of the FM RF-AGC is defined by an external capacitor connected to
TCFM and programmable internal currents. The currents can be selected independently for
AGC attack and decay. By this the ratio between the attack and the decay time can be
programmed between 0.4 and 250.
The FM RF-AGC has two output pins to drive one PIN diode attenuator and the external
preamplifier gain control.
The AGC outputs can be programmed to the following modes: Positive current I=f(e): after reaching the AGC threshold voltage, the current output
delivers a current I=f(e) up to 15mA in a voltage range from 0.1V (@10µA sink current)
up to VCC-1.2V with a quasi-exponential characteristic referred to the voltage at TCFM.
Figure 3. Positive current diagram
2. Pos/neg current I = f(e): below the AGC threshold voltage the AGC output sinks a
constant current of -5 mA. When the RF input level crosses the AGC threshold voltage,
the current is reduced down to 0 mA with a quasi-logarithmic behavior. At half control
voltage the current becomes positive and reaches up to 15mA following an exponential
function.
TDA7529 Function description
Figure 4. Positive/negative current diagram
3. Constant current mode: the output current can be set to 2 mA source current. The AGC
detector is in power -down mode and only the PIN diode driver is active.
4. Voltage and current mode with hand-over: the Vthr level is programmable with 6 bit in
the range of 0.2V to 2.56V . The voltage Vthr is the internal reference voltage of an
external cascode transistor emitter feedback loop.
Figure 5. Voltage and current mode with hand-over
The voltage output swing is comprised between 0V and 3.3V (VDD).
The microcontroller can read the voltage at the AGC capacitor via the serial control
interface.
3.3 AM RF-AGC
The AM AGC system is controlled by an average detector. The time constant of the AM RF-
AGC is defined by an external capacitor connected to TCAM and programmable internal
currents with symmetrical attack/decay behavior.
The AM RF-AGC has two output pins to drive one PIN diode attenuator and the external
preamplifier gain control.
The AGC outputs can be programmed to the same modes as the FM RF-AGC with the
exception of pos/neg current.
The microcontroller can read the voltage at the AGC capacitor via the serial control
interface.
Function description TDA7529
3.4 IF AGC and IF amplifier
The IF AGC system is controlled in AM with an average detector and in FM with a peak
detector, and reduces the mixer gain. The time constant is defined by two external
capacitors connected to TCIF1 and TCIF2 respectively, and programmable internal
currents.
The microcontroller can read the voltage at the AGC capacitors via the serial control
interface.
The IF amplifier gain is not affected by the on-chip IF-AGC but is meant to be controlled by
the back-end part of the system through pins IFAGC1 and IFAGC2. The gain is reduced in 6
dB steps starting from the programmed value "G" according to the following table:
3.5 Dividers
The mixer divider V is followed by a divide-by-4-stage that generates 0°/90°/-90° LO signals
for the IMR mixer (90°/-90° mode to switch between upper or lower side-band suppression
in the IMR mixer).
The main divider N can be operated in integer mode.
3.6 D/A converters
The front-end contains two D/A-converters for tuning the filters of the FM pre-stage. The
converters have a resolution of 9 bit.
Table 3. IF AGC and IF amplifier
TDA7529 Function description
3.7 VCO
The 3.7 GHz VCO has an internal switch that allows extending the oscillation frequency
range. This is required by the fact that each of the two resulting VCO sub-bands
(upper/lower) cannot individually cover the complete required frequency range versus
temperature and process; for this reason a calibration procedure is needed to determine the
process type (typical, slow, fast) and select the transition frequency between the two VCO
sub-bands.
To run the procedure the VCO range 2 must be selected, the synthesized frequency needs
to be set to 4GHz; then if Vtuning > 2.6V then the process is 'slow', if Vtuning < 1.7V then is
'fast' and otherwise is 'typical'. The switching frequency as a function of the process is
reported in the following table:
3.8 FREF
The reference frequency for the PLL can be derived by a XTAL directly connected to the
device or by means of an LVDS signal. In the latter case an external matching resistor must
be used to obtain the desired input signal level.
3.9 A/D converter
The front-end contains a 6 bit SAR A/D-converter for sensing several analog values of the
tuner. The following analog sources can be switched to the ADC input by software
command: FM RF AGC capacitor voltage AM RF AGC capacitor voltage IF AGC capacitor voltage (automatically connected to the FM or AM IF AGC filtering
capacitor) PLL tuning voltage Temperature sensor GPIO 1 voltage GPIO 2 voltage ADC reference generated from VCC.
The ADC can be clocked by an integrated RC-oscillator, in which case the oscillation
frequency is programmable, or by the PLL reference frequency.
Table 4. Switching frequency as a function of the process
Function description TDA7529
3.10 GPIO - general purpose IO interface pins
The front-end has seven GPIO - general purpose control pins to switch external stages
(output), e.g amplifiers, or to read the status of external stages (input), e.g. control voltages.
Some control pins are multiplexed with other functions that are not necessary in every tuner
design (FM AGC keying, AM cascode control). All the GPIOs may put in tristate or in enable
mode. When in enable the GPIOs can be configured as shown in the following table.
All GPIOs are short-circuit protected by current limiter and voltage-tolerant up to 3.5 V.
Table 5. GPIO - general purpose IO interface pins
TDA7529 Function description
3.11 AFSAMPLE/AFHOLD
On the TDA7529 there are two dedicated open drain pins (AFSAMPLE and AFHOLD), that
allow the control of the DSP (mute and quality controls) during AF update.
Details are given in Chapter5.
3.12 Serial bus interface
The TDA7529 has a serial data port for communication with the microcontroller. It is used for
programming the device and for reading out its detectors. This port supports data
communication using the SPI and the I2 C protocol. The data transfer of several consecutive
bytes is supported by the auto increment feature.
The "PS"- pin (protocol select) determines which communication protocol is used. The
information is not latched, so any level change at this pin immediately affects the protocol
used by the TDA7529.
The SPI protocol is selected by setting PS = 0 while, during the I2 C operation, PS needs to
be open (internally set to 1).
SPI-Protocol: CPOL=1, CPHA=1.
The CS pin performs the Chip Select function during the SPI operation; it has to be reset to
0 during transmission or reception, otherwise set to 1 (the CS pin is set to 1 by leaving it
open).
Both the CS and the AS functions are performed by the CS pin.
When the I2 C mode is used, the "AS" pin determines which I2 C address or group of
addresses (see below) is used. Three different external connections are defined to
represent three groups of addresses (refer to the following table for details). The information
is not latched, so any level change at this pin immediately affects the address used by the
TDA7529.
First the IC address is transmitted including the R/W bit for setting the direction of the
following data transfer
Table 6. Supports data communication using the SPI and the I2 C protocol
Function description TDA7529
= must be "0" for reading, can be "1" or "0" for writing to the TDA7529 = determinates the direction of data transfer, reading or writing
R / W = indicates the address to read to and/or to write from a single TDA7529 = indicates those addresses that can be used to transmit equal data to several TDA7529 frontends. A
read out has no purpose for these addresses (data collision), but must be possible without damaging
the tuner IC.
The two serial bus protocols, I2 C and SPI, are as follows:
Figure 6. I2 C (sub address mode)
Figure 7. SPI
Data auto increment mode is always active regardless of the serial bus mode chosen.
Table 7. I2 C addresses
TDA7529 Electrical specifications
4 Electrical specifications
Electrical parameters are guaranteed if Fref = 100kHz, with frequency stability of +/- 20ppm
max.
4.1 Absolute maximum ratings
4.2 Thermal data
4.3 General key parameters
Table 8. Absolute maximum ratings
Table 9. Thermal data
Table 10. General key parameters
Electrical specifications TDA7529
4.4 FM - section
Refer to application circuit in figure 3. VCC = 4.7V to 5.35V; Tamb = -40 to +105°C; fc = 76 to
108 MHz; 60dBµV antenna level; mono signal, unless otherwise specified. Antenna level
equivalence: 0dBµV = 1µVrms, all RF levels are intended as PD.
Table 11. FM - section parameter guaranteed by correlation.
TDA7529 Electrical specifications
4.5 AM - section
Refer to application circuit in figure 3. VCC = 4.7V to 5.35V; Tamb = -40 to +105°C; LW, MW
and SW bands; 74dBµV antenna level, unless otherwise specified. Antenna level
equivalence: 0dBµV = 1µVrms, all RF levels are intended as EMF.
Table 12. AM - section
Electrical specifications TDA7529
4.6 IF - section
Table 12. AM - section (continued)
Table 13. IF - section
TDA7529 Electrical specifications
Table 13. IF - section (continued)
Electrical specifications TDA7529
4.7 VCO
4.8 Reference frequency input buffer
4.9 Dividers
Table 14. VCO
Table 15. Reference frequency input buffer
Table 16. Dividers
TDA7529 Electrical specifications
4.10 Phase locked loop
4.11 Phase frequency detector and charge pump
Table 17. Phase Locked Loop
Table 18. Phase frequency detector and charge pump
Electrical specifications TDA7529
4.12 Temperature sensor
4.13 D/A-converter
4.14 A/D-converter
Table 19. Temperature sensor
Table 20. D/A-converter
Table 21. A/D-converter
TDA7529 Electrical specifications
4.15 GPIO – general purpose IO interface pins
4.16 AFSAMPLE / AFHOLD
Table 22. GPIO - general purpose IO interface pins
Table 23. AFSAMPLE / AFHOLD
Electrical specifications TDA7529
4.17 Serial data interface
Table 24. Serial data interface
TDA7529 Tuning state machine T uning state machine
Frequency changes in a system employing the TDA7529 can be efficiently performed using
a built-in state machine which simplifies the microprocessor supervisory functions. The state
machine, which can work in 8 different modes, can be invoked by a simple WRITE operation
into the tuner registers and, provided that the frequency to be jumped to has been pre-
loaded into the front-end registers through a previous separate or is loaded through a
concurrent WRITE operation, the FE jump sequence is automatically managed and flags
are provided to the back-end to indicate the current condition.
5.1 Tuning state machine modes
Hereafter the description of the 8 modes can be found. They are chosen by Byte 12
bits<6:4>.
The diagrams depicting the FE and flag conditions for each of the 8 modes are as follows:
5.1.1 Mode 000: buffer (nil)
When this mode is selected, no action is undertaken by the state machine.
5.1.2 Mode 001: preset
Figure 8. Preset timing diagram
This mode is used to jump to a different frequency and stay there, with reception at the end
of the sequence.
AFSAMPLE can be used to tell the back-end when to mute and to unmute the audio output.
The 60 ms mute time (programmable) after the PLL has reached the locked condition can
be used to check the RDS signal presence and content in addition to the analog quality
information.
AFHOLD can be used to tell the back-end to switch to faster time constants for quick quality
acquisition.
Tuning state machine TDA7529
5.1.3 Mode 010: search
Figure 9. Search timing diagram
This mode is used to jump to a different frequency and stay there, with audio muted.
AFSAMPLE can be used to tell the back-end when to mute the audio output.
AFHOLD can be used to tell the back-end to switch to faster time constants for quick quality
acquisition.
5.1.4 Mode 011: AF update
Figure 10. AF update timing diagram
This mode is used to jump to an AF frequency, check its quality, jump back to the starting
frequency and continue reception.
AFSAMPLE can be used to tell the back-end when to acquire the AF frequency quality.
AFHOLD can be used to tell the back-end to mute/unmute the audio and keep normal
processing on hold.
TDA7529 Tuning state machine
5.1.5 Mode 100: jump
Figure 11. Jump timing diagram
This mode is used to jump to a different frequency and stay there, with reception at the end
of the sequence.
AFHOLD can be used to tell the back-end to mute/unmute the audio and keep normal
processing on hold.
AFSAMPLE can be used to tell the back-end when the quality signal processing can be
restarted, with a stable situation to start from.
5.2 Mode 100: check
Figure 12. Check timing diagram
This mode is used to jump to a different frequency and stay there, with audio muted.
AFHOLD can be used to tell the back-end to mute/unmute the audio and keep normal
processing on hold.
AFSAMPLE can be used to tell the back-end when to freeze the quality signal processing.
