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TDA5200INFIEONN/a450avaiASK Single Conversion Receiver


TDA5200 ,ASK Single Conversion ReceiverWireless ComponentsASK Single Conversion ReceiverTDA 5200 Version 2.7Specification March 2000 R ..
TDA5201 ,ASK Single Conversion Receivercharacteristics.Terms of delivery and rights to change design reserved.Due to technical requirement ..
TDA5201 ,ASK Single Conversion ReceiverGeneral Description The IC is a very low power consump-tion single chip ASK Single Conver-sion Rece ..
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TG110-E055N5 , Extended Temperature Range, E-Ultra™ 10/100BASE-TX SOIC-16 Magnetic Modules
TG16C60 , TRIAC (ISOLATED MOLD TYPE)
TG2000F ,TV TUNER/ UHF RF AMPLIFIER APPLICATIONS)FEATURESo On account of this Device build in Bias Circuit, Cut downnumhnr rtf surtirlescInulllwul V ..
TG2006F ,GaAs Linear Integrated Circuit GaAs Monolithic 1.9 GHz Band Power Amplifier PHS, Digital Cordless TelecommunicationElectrical Characteristics (V = 3 V, V = (Note2), f = 1.9 GHz, Ta = 25°C, Z = Z = 50 Ω, 1/2 duty op ..
TG2200AF ,RF Cell PacksFEATURES0 LOW INSERTION LOSS : Loss=0.5dB (Typ.)0 HIGH ISOLATION : |SL=25dB (Typ.). CUNIRUL VULIAGI ..
TG2204F ,1.9GHz BAND ANTENNA SWITCH (PHS DIGITAL CORDLESS TELEPHONE)FEATURESo LOWINSERTION LOSS : Loss=0.5dB(Typ.)O HIGHTISOLATION : |SL=25dB(Typ.)O (ONTROI \IOITAGF . ..


TDA5200
ASK Single Conversion Receiver
Wireless Components
ASK Single Conversion Receiver
TDA 5200 Version 2.7
Specification March 2000
Edition 03.00
Published by Infineon Technologies AG,
Balanstraße 73,
81541 München

© InfineonTechnologiesAG March 2000.
All Rights Reserved.
Attention please!

As far as patents or other rights of third parties are concerned, liability is only assumed for components, not for applications, processes and circuits im-
plemented within components or assemblies.
The information describes the type of component and shall not be considered as assured characteristics.
Terms of delivery and rights to change design reserved.
Due to technical requirements components may contain dangerous substances. For information on the types in question please contact your nearest
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Components used in life-support devices or systems must be expressly authorized for such purpose!

Critical components1 of the InfineonTechnologiesAG, may only be used in life-support devices or systems2 with the express written approval of the
InfineonTechnologiesAG.A critical component is a component used in a life-support device or system whose failure can reasonably be expected to cause the failure of that life-
support device or system, or to affect its safety or effectiveness of that device or system.Life support devices or systems are intended (a) to be implanted in the human body, or (b) to support and/or maintain and sustain human life. If they
fail, it is reasonable to assume that the health of the user may be endangered.
Product Info
Product Info
General Description
The IC is a very low power consump-
tion single chip ASK Single Conver-
sion Receiver for the frequency bands
868-870 MHz and 433-435 MHz. The
IC offers a high level of integration and
needs only a few external compo-
nents. The device contains a low noise
amplifier (LNA), a double balanced
mixer, a fully integrated VCO, a PLL
synthesiser, a crystal oscillator, a lim-
iter with RSSI generator, a data filter, a
data comparator (slicer) and a peak
detector. Additionally there is a power
down feature to save battery life.
Features
-Low supply current (Is = 4.8mA typ.
at 868MHz, Is = 4.6mA typ. at
434MHz)Supply voltage range 5V ±10%Power down mode with very low
supply current (50nA typ)Fully integrated VCO and PLL
SynthesiserRF input sensitivity < –107dBmSelectable frequency ranges
868-870 MHz and 433-435 MHzLimiter with RSSI generation,
operating at 10.7MHzSelectable reference frequency2nd order low pass data filter with
external capacitorsData slicer with self-adjusting
threshold
Application
-Keyless Entry SystemsRemote Control SystemsAlarm SystemsLow Bitrate Communication
Systems
Ordering Information

available on tape and reel
Table of ContentsTable of Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .iProduct Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-12.1Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.2Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.3Features. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.4Package Outlines. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-1
3.1Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2
3.2Pin Definition and Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3
3.3Functional Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-9
3.4Functional Blocks. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4.1Low Noise Amplifier (LNA). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4.2Mixer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4.3PLL Synthesizer. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
3.4.4Crystal Oscillator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-11
3.4.5Limiter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-11
3.4.6Data Filter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-11
3.4.7Data Slicer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-12
3.4.8Peak Detector. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-12
3.4.9Bandgap Reference Circuitry. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-12Applications. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-1
4.1Choice of LNA Threshold Voltage and Time Constant. . . . . . . . . . . . . . . . . . . . . . . . . . . .4-2
4.2Data Filter Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-4
4.3Quartz Load Capacitance Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-5
4.4Quartz Frequency Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-6
4.5Data Slicer Threshold Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-7Reference. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-1
5.1Electrical Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-2
5.1.1Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-2
5.1.2Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-3
5.1.3AC/DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-4
5.2Test Circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-9
5.3Test Board Layouts . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-10
5.4Bill of Materials. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5-12
Product Description2.1Overview. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.2Application . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.3Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-2
2.4Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2-3
Product Description
2.1Overview

The IC is a very low power consumption single chip ASK Single Conversion
Receiver for the frequency bands 868-870 MHz and 433-435 MHz. The IC
offers a high level of integration and needs only a few external components. The
device contains a low noise amplifier (LNA), a double balanced mixer, a fully
integrated VCO, a PLL synthesiser, a crystal oscillator, a limiter with RSSI gen-
erator, a data filter, a data comparator (slicer) and a peak detector. Additionally
there is a power down feature to save battery life.
2.2Application
Keyless Entry SystemsRemote Control SystemsAlarm SystemsLow Bitrate Communication Systems
2.3Features
Low supply current (Is = 4.8 mA typ. at 868MHz, 4.6mA typ. at 434MHz)Supply voltage range 5V ±10%Power down mode with very low supply current (100nA max.)Fully integrated VCO and PLL SynthesiserRF input sensitivity < –107dBmSelectable frequency ranges 868-870 MHz and 433-435 MHzSelectable reference frequencyLimiter with RSSI generation, operating at 10.7MHz2nd order low pass data filter with external capacitorsData slicer with self-adjusting threshold
2.4
Functional Description3.1Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-2
3.2Pin Definition and Function. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-3
3.3Functional Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-9
3.4Functional Blocks . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3-10
Functional Description
3.1Pin Configuration

Pin_Configuration.wmf
Figure 3-1IC Pin Configuration
Functional Description
3.2Pin Definition and Function
Functional Description
Functional Description
Functional Description
Functional Description
Functional Description
Functional Description
3.3Functional Block Diagram

Function_5200.wmf
Figure 3-2Main Block Diagram
Functional Description
3.4Functional Blocks
3.4.1Low Noise Amplifier (LNA)

The LNA is an on-chip cascode amplifier with a voltage gain of 15 to 20dB. The
gain figure is determined by the external matching networks situated ahead of
LNA and between the LNA output LNO (Pin 6) and the Mixer Inputs MI and MIX
(Pins 8 and 9). The noise figure of the LNA is approximately 3.2dB, the current
consumption is 500µA. The gain can be reduced by approximately 18dB. The
switching point of this AGC action can be determined externally by applying a
threshold voltage at the THRES pin (Pin 23). This voltage is compared internally
with the received signal (RSSI) level generated by the limiter circuitry. In case
that the RSSI level is higher than the threshold voltage the LNA gain is reduced
and vice versa. The threshold voltage can be generated by attaching a voltage
divider between the 3VOUT pin (Pin 24) which provides a temperature stable
3V output generated from the internal bandgap voltage and the THRES pin as
described in Section 4.1. The time constant of the AGC action can be deter-
mined by connecting a capacitor to the TAGC pin (Pin 4) and should be chosen
along with the appropriate threshold voltage according to the intended operat-
ing case and interference scenario to be expected during operation. The opti-
mum choice of AGC time constant and the threshold voltage is described in
Section 4.1.
3.4.2Mixer

The Double Balanced Mixer downconverts the input frequency (RF) in the
range of 433-435MHz/868-870MHz to the intermediate frequency (IF) at
10.7MHz with a voltage gain of approximately 21dB. A low pass filter with a cor-
ner frequency of 20MHz is built on chip in order to suppress RF signals to
appear at the IF output ( IFO pin). The IF output is internally consisting of an
emitter follower that has a source impedance of approximately 330 Ω=to facili-
tate interfacing the pin directly to a standard 10.7MHz ceramic filter without
additional matching circuitry.
3.4.3PLL Synthesizer

The Phase Locked Loop synthesiser consists of a VCO, an asynchronous
divider chain, a phase detector with charge pump and a loop filter and is fully
implemented on-chip. The VCO is including spiral inductors and varactor
diodes. It’s nominal centre frequency is 852MHz. No additional components are
necessary. The oscillator signal is fed both to the synthesiser divider chain and
to the downconverting mixer. In case of operation in the 433 - 435 MHz range,
the signal is divided by two before it is fed to the mixer. This is controlled by the
selection pin FSEL (Pin 11) as described in the following table. The overall divi-
Functional Description
sion ratio of the divider chain can be selected to be either 128 or 64, depending
on the frequency of the reference oscillator quartz (see below). The loop filter is
also realised fully on-chip.
3.4.4Crystal Oscillator

The on-chip crystal oscillator circuitry allows for utilisation of quartzes both in
the 6 and 13MHz range as the overall division ratio of the PLL can be switched
between 64 and 128 via the CSEL (Pin 16 ) pin according to the following table.
The calculation of the value of the necessary quartz load capacitance is shown
in Section 4.3, the quartz frequency calculation is expained in Section 4.4.
3.4.5Limiter

The Limiter is an AC coupled multistage amplifier with a cumulative gain of
approximately 80dB that has a bandpass-characteristic centred around
10.7MHz. It has an input impedance of 330 Ω=to allow for easy interfacing to a
10.7MHz ceramic IF filter. The limiter circuit acts as a Receive Signal Strength
Indicator (RSSI) generator which produces a DC voltage that is directly propor-
tional to the input signal level as can be seen in Figure 4-2. This signal is used
to demodulate the ASK receive signal in the subsequent baseband circuitry and
to turn down the LNA gain by approximately 17dB in case the input signal
strength is too strong as described in Section 3.4.1 and Section 4.1.
3.4.6Data Filter

The data filter comprises an OP-Amp with a bandwidth of 100kHz used as a
voltage follower and two 100kΩ=on-chip resistors. Along with two external
capacitors a 2nd order Sallen-Key low pass filter is formed. The selection of the
capacitor values is described in Section 4.2.
Functional Description
3.4.7Data Slicer

The data slicer is a fast comparator with a bandwidth of 100 kHz. This allows
for a maximum receive data rate of approximately 120kBaud. The maximum
achievable data rate also depends on the IF Filter bandwidth and the local oscil-
lator tolerance values. Both inputs are accessible. The output delivers a digital
data signal (CMOS-like levels) for the detector. The self-adjusting threshold on
pin 20 its generated by RC-term or peak detector depending on the baseband
coding scheme. The data slicer threshold generation alternatives are described
in more detail in Section 4.5.
3.4.8Peak Detector

The peak detector generates a DC voltage which is proportional to the peak
value of the receive data signal. An external RC network is necessary. The out-
put can be used as an indicator for the signal strength and also as a reference
for the data slicer. The maximum output current is 500µA.
3.4.9Bandgap Reference Circuitry

A Bandgap Reference Circuit provides a temperature stable reference voltage
for the device. A power down mode is available to switch off all subcircuits which
is controlled by the PWDN pin (Pin 27) as shown in the following table. The sup-
ply current drawn in this case is typically 50nA. .
Applications4.1Choice of LNA Threshold Voltage and Time Constant. . . . . . . . . . . .4-2
4.2Data Filter Design. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-4
4.3Quartz Load Capacitance Calculation . . . . . . . . . . . . . . . . . . . . . . . .4-5
4.4Quartz Frequency Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4-6
4.5Data Slicer Threshold Generation . . . . . . . . . . . . . . . . . . . . . . . . . . .4-7
Applications
4.1Choice of LNA Threshold Voltage and Time Constant

In the following figure the internal circuitry of the LNA automatic gain control is
shown.
LNA_autom.wmf
Figure 4-1LNA Automatic Gain Control Circuitry
The LNA automatic gain control circuitry consists of an operational transimped-
ance amplifier that is used to compare the received signal strength signal
(RSSI) generated by the Limiter with an externally provided threshold voltage
Uthres. As shown in the following figure the threshold voltage can have any
value between approximately 0.8 and 2.8V to provide a switching point within
the receive signal dynamic range.
This voltage Uthres is applied to the THRES pin (Pin 23) The threshold voltage
can be generated by attaching a voltage divider between the 3VOUT pin
(Pin 24) which provides a temperature stable 3V output generated from the
internal bandgap voltage and the THRES pin. If the RSSI level generated by the
Limiter is higher than Uthres, the OTA generates a positive current Iload. This
yields a voltage rise on the TAGC pin (Pin 4). Otherwise, the OTA generates a
negative current. These currents do not have the same values in order to
achieve a fast-attack and slow-release action of the AGC and are used to
charge an external capacitor which finally generates the LNA gain control volt-
age.
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