TC9278F ,SUMM-DELTA MODULATION SYSTEM DA CONVERTER WITH BUILT-IN 8 TIMES OVER SAMPLING DIGITAL FILTERTC9278F/PT(‘Q77RF T(‘Q77RPVI2-A MODULATION SYSTEM DA CONVERTER WITH BUILT-IN 8 TIMESOVER SAMPLING D ..
TC9279F ,Summ-Delta Modulation system DA converter with built-in 8 times over sampling digital filterTC9279F/PT(‘Q77QF T(‘Q77QPOVER SAMPLING DIGITAL FILTERThe TC9279F and TC9279F are a second-order EA ..
TC9283F ,CD SINGLE-CHIP PROCESSORFEATURES0 Sync pattern detection, sync signal protection and QFP100-P-1420-0.65synchronization can ..
TC9284BF ,CD SINGLE CHIP PROCESSOR WITH BUILT-IN 1BIT DA CONVERTERTC9284BFT(‘Q7RARFv . v IThe TC9284BF is a single chip processor for syncseparation protection/synch ..
TC9285P ,INFRARED REMOTE CONTROL RECEIVING LSITC9285PT(‘Q7REPThe TC9285P is an infrared Remote Control signalreceiving LSI is suited for remote c ..
TC9293AF ,SUMMTC9293AF/AFN/ANT(‘Q702AF T(‘Q7QRAFN T(‘Q7QRANEAS MODULATION SYSTEM DA CONVERTER WITH ANALOG FILTERT ..
TDA7388 ,Quad BTL output power amplifier with stand-by and muteTDA73884 x 45 W quad bridge car radio amplifierDatasheet - production data Low external component ..
TDA7388A ,Quad BTL output power amplifier with stand-by and mute inputs, clip and offset detectionsTDA7388A4 x 42 W quad bridge car radio amplifierDatasheet - production data Clipping detector Off ..
TDA7388A ,Quad BTL output power amplifier with stand-by and mute inputs, clip and offset detectionsapplications. Mute functionThanks to the fully complementary PNP/NPN output configuration the TDA7 ..
TDA7391 ,35W BRIDGE CAR RADIO AMPLIFIERELECTRICAL CHARACTERISTICS (V = 14.4V; R =4Ω, f = 1KHz, T =25°C, unless otherwiseS L ambspecified)S ..
TDA7391PD ,32W BRIDGE CAR RADIO AMPLIFIERFUNCTIONAL DESCRIPTIONPin Function DescriptionThe input stage is a high impedance type also capable ..
TDA7391PD13TR ,32W BRIDGE CAR RADIO AMPLIFIERELECTRICAL CHARACTERISTICS (V = 14.4V; R =4Ω, f = 1KHz, T =25°C, unless otherwiseS L ambspecified)S ..
TC9278F
SUMM-DELTA MODULATION SYSTEM DA CONVERTER WITH BUILT-IN 8 TIMES OVER SAMPLING DIGITAL FILTER
TOSHIBA TC9278F/P
TOSHIBA CMOS DIGITAL INTEGRATED CIRCUIT SILICON MONOLITHIC
TC9278F,, TC9278P
2-A MODULATION SYSTEM DA CONVERTER WITH BUILT-IN 8 TIMES
OVER SAMPLING DIGITAL FILTER
TC9278F, TC9278P are 2'nd order E-d modulation system TC9278F
1bit DA converter incorporating an 8-times over sampling
digital filter developed for digital audio equipment.
Because the IC is small package (SOP20, DIP20) and includes
the de-emphasis filter has been incorporation, it is possible
to constitute reducing the size and cost of the DA
converter.
FEATURES SOP20-P-300-1.27
TC9278P
O Built-in 8-times over sampling digital filter.
9 Low voltage operate (3.3V).
0 Built-in digital de-emphasis filter.
0 Over sampling ratio (OSR) is 192 fs.
0 Sampling frequency (fs) : 44.1 kHz
0 Support double speed operation.
DIP20-P-300-2.54A
0 Characteristics of the digital filter and DA converter are W . ht
as follows . SOP20-P-300-1.27 : 0.48g (Typ.)
DIP20-P-300-2.54A: 1.4g (Typ.)
Digital filter
DIGITAL PASS-BAND TRANSIENT STOP-BAND
FILTER RIPPLE BAND WIDTH SUPPRESSION
Standard operation 8fs i0.11dB 20 k~24.1 kHz -26dB
Double speed operation 8fs i0.11dB 20 k~24.1 kHz -26dB
DA converter (VDD = 5V)
OSR DISTORTION S/N RATIO
Standard operation 192 fs -90dB (Typ.) 98 dB (Typ.)
Double speed operation 96 fs -85dB (Typ.) 95 dB (Typ.)
1 2001-06-19
TOSHIBA TC9278F/P
PIN CONNECTION BLOCK DIAGRAM
LRCK BCK DATA FTS EMP MCK VDX XO XI GNDX
VDDUUZOULRCK (iiy36i(iibf12fiis3(iis)fii(12(i'2)fi"1)
Tlt2 19am l II-' l I it I l
GNDAI: 3 18 a IATA INTERFACE DIGITAL FILTER CIRCUIT
Rot 4 17 , HS CIRCUIT DE-EMPHASIS FILTER CIRCUIT OSCILLATOR CIRCUIT
Wot 5 16D EMP l l
VD_A[6 15 D MCK L
Lot 7 14 a VDX C) E-d MODULATION CIRCUIT TIMING GENERATOR
Lot 8 13 a xo
GNDAI 9 12 , XI '-
GNDD[10 11 u GNDX TEST OUTPUT OUTPUT
I CIRCUIT lCIRCUIT I fIRCUIT l''
0) Q) <2) (9 to OJ Lt) Q3) e) Q9
VDD T1 GNDA R0 H) VDA LO LO GNDA GNDD
PIN FUNCTION
m“ SYMBOL I/O FUNCTION & OPERATION REMARKS
1 VDD - Digital power supply pin
2 T1 I Test pin. Normally, use at "L".
3 GNDA - Analog GND pin
4 RO 0 Right channel data forward output pin.
5 RO 0 Right channel data reversed output pin.
6 VDA - Analog power supply pin
7 CO O Left channel data reverse output pin.
8 LO 0 Left channel data forward output pin.
9 GNDA - Analog GND pin
10 GNDD - Digital GND pin.
11 GNDX - Crystal oscillator GND pin.
12 XI I Crystal oscillator connection pin.
Connect to a crystal oscillator, generates needed for the _Elfi5
13 xo 0 system. (384 fs) XI X0
14 VDX - Oscillator power supply pin.
15 MCK 0 System clock output pin. (384fs)
16 EMP I De-empnhaHSIS filter ON/(BFE switching pm.
ON at H and OFF at L .
-..._ Standard/double speed operation mode switching pin.
17 HS I . " " . " "
Standard operation at H ' double speed operation at L .
18 DATA I Audio data input pin.
19 BCK I Bit clock input pin.
20 LRCK I LR clock input pin.
2001 -06-1 9
TOSHIBA TC9278F/P
DESCRIPTION OF BLOCK OPERATION
1. Crystal oscillation circuit and timing generator
The clock required for internal operations is generated by connecting a crystal and condensers as
shown in the diagram below.
The IC will also operate when a system clock is input from an external source through the XI pin
(pin 12). However, in this situation, due consideration must be given to the fact that waveform
characteristics, such as jitter and rising/falling characteristics of the system clock, significantly affect
the DA converter's noise distortion and the S/N ratio.
To internal circuit
-ii; (l)"?..)
GNDX XI xo va MCK
ll 16.9344MHZ
E ’ch CL = 10-33 pF
Use a crystal with a low Cl value and favorable start-up characteristics.
Fig. 1 Configuration of Crystal Oscillation Circuit
The timing generator generates the clocks and process timing signals required for such functions as
digital filtering and de-emphasis filtering.
2. Data input circuit
DATA and the LRCK are loaded to the LSI internal shift registers on the BCK signal rising edge. It is
consequently necessary for the DATA and LRCK signals to be synchronized and input on the BCK
signal falling edge as indicated in the timing example below. BCK is available only 32 fs.
Also, as DATA has been designed so that the 16 bits before the change point of LRCK are regarded
as valid data, the data must be input with Right-justified mode.
BCK 'iiilJillililililzlzll:lllHilllillllllllllll:
Fig.2 Example of input timing chart
3 2001-06-19
TOSHIBA TC9278F/P
3. Digital filter
The 8-times oversampling IIR digital filter eliminates the noise returned from outside the bandwidth
during standard and double speed operations.
Table-1 basic characteristics of digital filter
PASS-BAND TRANSIENT
RIPPLE BANDWIDTH ATTENUATION
Standard operation 10.11dB 20.0 k~24.1 kHz -26di? or less
Double speed operation i0.11dB 20.0 k~24.1 kHz -26dB or less
The characteristics of the digital filter frequencies are shown below.
- 20. -0.20
- 30. -0.30
-40. -(h40
- 50. -0.50
GAIN (dB)
GAIN (dB)
- 60. -0.60
- 70. -0.70
- 80, -0.80
-90. -0.90
0 44.1 88.2 132.3 176.4 000 2.0 4.0 6.0 8.0 10.012.014.016.018.0 20.022.024.0
FREQUENCY (kHz) FREQUENCY (kHz)
Fig.3 Digital filter frequency characteristics
4. De-emphasis filter
The built-in IIR type digital de-emphasis filter circuit is available for fs = 44.1 kHz.
ON/OFF is controlled with the EMP pin.
Table-2 De-emphasis filter settings
EMP PIN H L
De-emphasis Filter ON OFF
The digitalization of the de-emphasis filter eliminates the need for such external components as
resistors, condensers and analog switches. In addition to this, the coefficients are aligned to reduce
error in the de-emphasis filter characteristics.
The filter structure and characteristics are shown below.
Input data fih. Ltr-s, fih.
(b + b Z-I) 1 1
Transfer function : H (Z) = u20'_''1e'; /TI /T2
(1 -a12-1) T1=50ps,T2=15ps
Fig.4 IIR Digital De-emphasis Filter Fig.5 Filter Characteristics
4 2001-06-19
TOSHIBA TC9278F/P
5. DA conversion circuit
The IC incorporates a 2'nd order E-A modulation DA converter for two channels (simultaneous
output type). The internal structure of this is shown in Fig.6.
I,-,] Y Z
. Q ( ) Output data
(Bit-stream 1-bit DA conversion data)
2'nd order E-A converter : Y(Z) = X(Z) + (1 -2-1)2Q(Z)
Fig.6 E-n modulation DA converter
The E-A modulation clock has been designed to operate at 192 fs. The noise shaping characteristics
are shown in Fig.7.
NOISE POWER (dB)
0 500k IM
FREQUENCY (Hz)
Fig.7 Noise shaping characteristic
6. Data output circuit
In this circuits, output data waveform is shaped and forward and reverse signals of bit stream data
are output to the outside through a buffer.
By differentiating these forward signal and the reverse signal in the external analog circuit, DA
conversion output of low distortion and high S/N ratio can be obtained.
I id GNDA
Bit stream 1 bit nm e LPF
DA conversion data D Q ,
SR6 I Analog output
Buffer
Sift register VDA + 5 V
(XI/2)
Fig.8 Construction of data output circuit
5 2001-06-19
TOSHIBA TC9278F/P
MAXIMUM RATINGS (Ta = 25°C)
CHARACTERISTIC SYMBOL RATING UNIT
VDD -0.3~6.0
Supply Voltage VDA -0.3--6.0 V
VDX -0.3--6.0
Input Voltage Vin -0.3--VDD + 0.3 V
TC9278F 200
P Di . . P IN
ower issipation TC9278F D 300 m
Operating Temperature Topr -35--85 "C
Storage Temperature Tstg - 55--150 "C
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, Ta = 25°C, VDD = VDX = VDA = 5V)
DC CHARACTERISTICS
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN TYP. MAX UNIT
Ope atin s ppl VDD 4.5 5.0 5.5
r I g u y 0
Voltage (1) VDX Ta = -35--85 c 4.5 5.0 5.5 V
VDA 4.5 5.0 5.5
. VDD Ta = -15--55''C 3.3 3.5 5.5
1','1r2i,ni'2)su'"'ly VDX - Operation frequency) 3.3 3.5 5.5 V
g VDA fopr = 16.9 MHz 3.3 3.5 5.5
Power Dissipation IDD - XI = 16.9 MHz - 12 20 mA
"H" Level VIH VDD x 0.7 - VDD
Input Voltage "L" Level vlL - o - VDD x 0.3 V
"H" Level IIH
Input Current "L" Level 'IL - -10 - 10 pA
AC CHARACTERISTICS (Over sampling ratio = 192 fs)
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN TYP. MAX UNIT
Table Harmonic 1 kHz Sine wave, full-scale input
- - - B
Distortion + Noise 1 THD + N1 1 VDD = VDX = VDA= SV 90 80 d
Table Harmonic 1 kHz Sine wave, full-scale input
- - -7 B
Distortion + Noise 2 THD + N2 1 VDD = VDX = VDA = 3.5V 86 8 d
S/N Ratio S/N 1 90 98 - dB
1 kHz Sine wave
. ' - B
Dynamic Range DR 1 -60dB input conversion 90 95 d
Cross-talk CT 1 1 kHz Sine wave, full-scale input - -95 -90 dB
Operating Frequency fopr - VDD = VDA = VDX 3 4.5V - 16.9344 - MHz
In t F fLR LRCK duty cycle = 50% - 44.1 - kHz
pu requency fBCK - BCK duty cycle = 50% - 1.4112 - MHz
Rise Time tr 0 - - 15
Fall Time tf - LRCK, BCK (10 90 A) - - 15 ns
Delay Time td - BCK_LEdge -9 LRCK, DATA - - 40 ns
2001 -06-1 9
TOSHIBA
TC9278F/P
Single processor
for CD Player
0 TEST CIRCUlT-1 '. With the use
of application circuit example-il
DATA LOUT 20 kHz _ DISTORTION
s G BCK APPLICATION CIRCUIT FACTOR
LRCK EXAMPLE-2 ROUT IDEAL LPF _ GAUGE
SG : ANRITSU MG-22A or equivalent
LPF : SHIBASOKU 725C internal filter
DISTORTION FACTOR GAUGE : SHIBASOKU 725C or equivalent
MEASURING ITEM
DISTORTION FACTOR GAUGE
FILTER SETTING A WEIGHT
THD + N, CT
S/N, DR
---G. 50%
APPLICATION CIRCUIT EXAMPLE-1 (+5V Single
0 AC CHARACTERISTICS STIPULATED POINT (Input signal stipulation :
power supply used)
A weight : IEC-A or equivalent
LRCK, BCK, DATA)
_ GNDX GNDD D-t
it-t XI GNDA : y-t _ :CSL NC D
16.9 MHZ: 5V u.
LO F-! LI Vcc I,“
- x-dr-C xo a. D-Y' I'
co 5V RD 1 k0
XI —C MCK tr'.": VDA D-b CNC CD NC D 47 F
EMPH -C) EMP 8 RO Q-C) sue GND < VRIP D-yi-s
Cs -Crrs _ RO 2riir-f; RI - RO D-1tt-,f"-ch Analog OUT
AOUT -C) DATA GNDA D-t RI GND D-t l3
BCK -(2 BCK T1 D-t it-C) CSR A NC D
CHCK -C) VDD D-e ANALOG FILTER IC
LRCK A 5V
2001 -06-1 9
TOSHIBA TC9278F/P
APPLICATION CIRCUIT EXAMPLE-2 (+5V Two power supply used)
=Vcc E?
4 _ Cl o
t-s GNDX GNDD D-t g
16.9 11/111:ch XI GNDA D-t 33 pF
N s-cr-C: XO tlL LO D-3"A3t?tk)? 18kQ 1 k0 L-ch Analog OUT
"s, 39 pF u,
- D ... , 18 k0 cl 10 pd' n.
5 v tX) 33 m 33 m F-l 33 pF iz", sei, 'l1 I u,
x-Civics: h vssD-trsv N "33 2
EMPH C? mp Ot Co
' - - 33 kg 33 k0
',1n,1yg:',cvt','"" HS C.?, HS r- RO 'lr,)(Ct'j,"st',3l's,(( I E Cl a
or ayer 39pF _v La
AOUT -C) DATA GNDA', H F-lk-w 33 PF 1:424 ' (3 gl
33 kg 33 kg 18 k0 _ 10 td' 1 k9. R-ch Analog OUT
BCK -C) BCK T1 F-t _ t + - u.
w 18 km E J; g
CHCK —( LRCK A VDD Y-tr 5V F-, 33 pF k 2 5V 3
_-Vcc 9
2 cc 2 CC
GNDX GNDD D-t
16.9 JCt,2-c XI GNDA C) f? Q
22 k 18 k
_\ t-: C?, XO CL LO L-ch Analog OUT
"s, - 68 PF 27 pF
5 v 00 22 k0. 18 k0. 82 k9
XI C MCK Ps VDA D-tr 5 v
N - 22 k9 18 km 82 m
EMPH -c EMP RO 68 F,
Single processor - E R0 p 27 PF
for CD Player HS C HS 22 k0 18kQ R-ch Analog OUT
AOUT -c DATA GNDA D-t
W -c BCK TID-t tr
CHCK -c LRCK p'''"'') VDD D-tr 5V 1
(Cautions)
0 Quality of crystal oscillation waveform largely affect S/N ratio and noise distortion.
Further, this is also true then system clock is input externally through the XI pin of
o Suppress glitch of input signals (LRCK, BCK, DATA) as could as possible.
0 The wiring between the TC9278F/P output and the analog filter amplifier input must
be made the shortest.
o The capacitor between VDA and GNDA, VDD and GNDD, VDX and GNDX shall be
connected as close to the pin as possible.
8 2001-06-19
TOSHIBA
PACKAGE DIMENSIONS
SOP20-P-300-1.27
'ihiiripas/s1r------r--""
: 5.3:02
7 3:0 3
lrlhrlrleljljljrL___.._...a._,
0.685TYP =
13.3MAX
0.4 i0.1 *
Weight : 0.48g (Typ.)
ti?, E
tip-dr."
T"",, 1-
TC9278F/P
Unit : mm
(300mil)
(3-15—0255
-. I 0.23:0.2
2001 -06-1 9
TOSHIBA TC9278F/P
PACKAGE DIMENSIONS
DlP20-P-300-2.54A Unit : mm
0—01 5°
Y'"---''--'''-'''''',-?
25.1 MAX
24.6:02 d
3.13:0.3
0.87TYP
Weight : 1.49 (Typ.)
10 2001-06-19
TOSHIBA TC9278F/P
RESTRICTIONS ON PRODUCT USE
000707EBA
OTOSHIBA is continually working to improve the quality and reliability of its products.
Nevertheless, semiconductor devices in general can malfunction or fail due to their inherent
electrical sensitivity and vulnerability to physical stress. It is the responsibility of the buyer,
when utilizing TOSHIBA products, to comply with the standards of safety in making a safe
design for the entire system, and to avoid situations in which a malfunction or failure of such
TOSHIBA products could cause loss of human life, bodily injury or damage to property.
In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent TOSHIBA products specifications. Also, please
keep in mind the precautions and conditions set forth in the "Handling Guide for
Semiconductor Devices," or "TOSHIBA Semiconductor Reliability Handbook" etc..
OThe TOSHIBA products listed in this document are intended for usage in general electronics
applications (computer, personal equipment, office equipment, measuring equipment, industrial
robotics, domestic appliances, etc.). These TOSHIBA products are neither intended nor
warranted for usage in equipment that requires extraordinarily high quality and/or reliability or
a malfunction or failure of which may cause loss of human life or bodily injury ("Unintended
Usage"). Unintended Usage include atomic energy control instruments, airplane or spaceship
instruments, transportation instruments, traffic signal instruments, combustion control
instruments, medical instruments, all types of safety devices, etc.. Unintended Usage of TOSHIBA
products listed in this document shall be made at the customer's own risk.
0 The products described in this document are subject to the foreign exchange and foreign trade
OThe information contained herein is presented only as a guide for the applications of our
products. No responsibility is assumed by TOSHIBA CORPORATION for any infringements of
intellectual property or other rights of the third parties which may result from its use. No
license is granted by implication or otherwise under any intellectual property or other rights of
TOSHIBA CORPORATION or others.
0 The information contained herein is subject to change without notice.
11 2001-06-19
:
www.loq.com
.
