TC9125BP ,FM/AM/TV Synthesizer PLLiiiii'iiiiiiiii, ELECTRONIC /li,il, DE‘1. 1:11:21. 1 ._:.,. a? H ; -- 'cc-uni-u-Lic-La-UU-asc-cas-s ..
TC9128P ,High speed PLL with built-in prescalerTOSHIBA TC9172AP,TC9227,28PT(‘Q177AP T(‘Q777P T(‘Q77RPTC9172AP, TC9227P and TC9228P are high-speed ..
TC9134P ,32-FUNCTION REMOTE CONTROL RECEIVING LSI,ie,Ei'7 ELECTRONIC DE DE-. 5- ic'. " TirrurTTTut 4:5;4k.309724? D017E65 D2ft-77-llTC9134P 32-FUNCT ..
TC9142P ,Quartz PLL Motor ControlQUARTZ PLL MOTOR CONTROLThe TC9142P is a c2-rsos LSI developed for con-trolling the motor of a quar ..
TC9142P. ,Quartz PLL Motor ControlQUARTZ PLL MOTOR CONTROLThe TC9142P is a c2-rsos LSI developed for con-trolling the motor of a quar ..
TC9143P ,for Tape Deck ControlTOSHIBA1 1ri':i'l'ti1'('isttl'"[' DEfFOR TAPE DECK CONTROLTC9143P/T09144P are C-MOS IC for electro- ..
TDA7072 ,Single BTL power driver
TDA7072 ,Single BTL power driver
TDA7073AT ,Dual BTL power driver
TDA7073AT ,Dual BTL power driver
TDA7073AT ,Dual BTL power driver
TDA7073AT ,Dual BTL power driver
TC9125BP
FM/AM/TV Synthesizer PLL
'1''iC''lii'i1irlr,
i'i:si'-'i':',',ii5'i'il'l'r)77a'iaiiCri']
TC91258P Lm, (LN, MW, SN)/TV SYNTHESIZER PLL
TQ9125BP'is CMOS LSI developed for the
digital tuning system and has the following
features. _ f
The system design with high flexibility
'allows the applications bf frequency
synthesizers covering all the frequency
ranges of FM/LW/SW/MW and Ty.
High speed programmable counter has been
realized by TOSHIBA's unique circuitry
and prpiess, end 1/8' frequency divider
can be used as the prescaller for receiv-
Unit in mm
Eui.u=l-=3L-gb.-lL-Jb"
162i025.
Q25-005
Lead pitch is 2d51 and tolerance lis
1025 against theoretical center of
each lead that is obtained on the
basis of No.1 and No.16 leads.
. JEDEO _
ing FM signals obtaining high S/N ratio.‘ TOSHIBA 3916A-P .
. When eombined with prescaller TD6102P, IF
of FM "receiving can be Siiehuna2 by ZSkHz
shifting with the center frequency of 10. 7MHz.
. The channel step of 50 kHz for Europe can also be handled.
PIN CONNECTION
MAXIMUM RATINGS ( T8=25°C )
CHARACTERISTIC SYMBOL RATING UNIT
Supply Vbltage VDD -0.3 W 10.0
Input Voltage
-0 3 m VDD+0 3
Voltage Applied to
Output Terminal
-0 3 m VDD+0 3
Power Dissipation
Operating Temperature
-30 m 70
Storage Temperature
.-55 m 125 _
m7. CCT, mil: um um
??SIKLJEDICJ tmtsprgud II3'
VTOSHIBAI
TCQ’II 25%|?
ELI? 0010543 I:
_r-50r.17_,
'. Having two phase comparator outputs, two kinds of low pass filters can
be used) without switching. . _
. TC9125BP ha), the input circuits most suitable for using a micro computer
as Its controller and the programming can be achieved through only five
_ terinina1s, A through D and, LOAD.
o' The threshold _voltage of the input terminals for program has been set low
enoug'h to eliminate limitation of power supply, voltage; when connected to'
'a micro computér.
. Qompact having 16 pin DIP arrangement.,
FUNCTIONAL DEéCRIPTiON 0F TERMINALS
:3: SYMBOL PE or 44....- 4..:::::I::;°2.::44. REMARKS
1 GND Ground-Terminal Pe
ii Crystal Oscil- Terminal to connect 9.0 MHz Equipped with.
XT lator Terminal crystal feedback
. resistor.
k LOAD Lpad Input Input terminal for Read Com-
Thrminal mand for the data on A through
_ D. When this terminal is at
" - h _ t" "1" level, the gata ls read in'
1 ; and when-it ls i, "0" level,
the-previous data is retained
f;‘ (regardless of other inputs.
: 5 h: ‘?rogram Data - Input terminals for the refer-
; 6 "si , input Terminals: enhe frequency selection data -
"T" 6 7 7:“ ' . and this fréquency division rack
- . 8 D 1 dare for progiramaablis counter, -
r,:szzrirosrsuvra'i"i/', V TJ'"%','.GT.1.' L'h'Ta'a%T4llr, .4.
TCr/GNT, .II. l-III all',," 3ICir, .n"IIu nu
u'gI. llllull 'alll
'')''t;7i"l"i'",'
C7afrIs't'5?cTg'ieE"fr"7"'vte'Fc7 tC.. s,c,tUdc'rca_s:av_v-1ci'ri'c='
T-50- 17
PIN DESCRIPTION OF
REMARKS
N0. SYMBOL NAME OF TERMINAL FUNCTION AND OPERATION
9 PIN' Programmable Input terminal of-programmable Equipped with
Counter Input counter ' input
Terminal _ 7 1 . ' _ _ amplifier
7 10 Panrl Programmable Frequency division output
11 POUT'Z Counter Output terminal of programmable
Terminal counter. Connected to pre-
scaller TD6102P for fine
adjustment of IF frequency of
_ FM and 50 kHz shifting in
Europe. Signals from Pout-1
_ and Pout-2 are output at the
points of different phase.
12 lOOkHz lOOkHz Clock Output Output terminal of 100 kHz
Terminal _ signal which can be utilized
T as the clock of micro
computer;
. 13 LD Lockout Detection Holds "H" level during
Terminal lockout.
l4 DO-l Phase Comparator Connected to low pass filters.
15 DO-2 Output Terminals
_ Supply Voltage
16 VDD Terminal -
.......~.. ---1....u...~-...m
.%%'llr, .n. .nm-m. .nmmmn ..u. umn
''a".auu.MmtD DIGITAL "2rarra:
'i7iri'i''i"i'ri' ELECTRONIC De DED “ID‘WEH?
TCQHZEEP \
DDL76H5 Cl T
T-50-17
ELECTRICAL CHARACTERISTICS (mas otherwis-e specified, Ta=25°C, VDD=7.ov)
I CHARACTERISTIC SYMBOL TEST TEST CONDITION MIN, TYP. MAX. UNIT
' CIRCUIT _
* Operating Supply VDD(1) an=11MHz, VIN=1.7Vp-p 5.5 - 9.0 V
Voltage Range vDD(2) PIN=16MHz, VIN=1.7Vp-p 7.0 - _ 9.0 ll
* Opefating Supply VDD=6.OV, PIN=10MHz-
_ 1139(1) - 6.0 12.0 mA
Current -, V __. 9ABJBzx-Tal is connected
. to xr-Yi
t VDD=8.0V, Pm=15MHz V
I 2 _ _ -
D.D( ) 9.0tfHzX-.ta1 is connected IIA) 18.0 mA
_ to m-ri
(Programmable Counter) (PIN).
* Maximum 0p_erating fMAX(1) VDD=5.5V, VIN=1.7Vp-p 11 - - MHz
J?requency fHAx(2) VDD=7-0V. VIN=1-7VP-P 16 ... - MHz
* Minimum Operating . voty---Cru9.01r, _
f - - 200 kHz
Frequency MIN _ VIN=1-7VP'P
t Operating Input VIN VDD=7.0V, PIN=16MHz 1.7 - 6.0 Vp-p
Amplitude
Reference Frequency - = - ; tl.
(Divider ) (XT-XT) VDD 5.5V V _
* Maximum Operating _ r9.0MRzX-Ta1 is connected _ - "
Frequency fm . to XI-Tr 9 MHZ
Program In ut d ND’)
(Terminal ) LOAD
* Threshold Voltage Vth (1) VDD=6.0V 0.5 - 3.1 v
Range - Vth (2) 1rImsa8.01l .o.7 - 3.5 v
5;: TOSHIB-A-u ELECTRONIC DEE j.D“l'?E'-l? UULTBHE l l.lil,CLrL,,
.. - T-50-17
CHARACTERISTIC SYMBOL TEST TEST CONDITION MIN TYP- IMAX UNIT
CIRCUIT . q '
Input "R" Level 1m _ VIHé9.0V - - 10 Wt
Leakage
Current "L" Level 11L vtrr-01t - - -10 PA
"It" Level Output
Current ) (IOH)
POUT-1.2 Output _ IOHPOUT
lOOkHz Output IonlOOkHz _ Irar--6 . 0V -0. 3 - - mA
LD Output Itm D0
D0 - 1,2 Output IOH D0
"L" Level Output
Current, ) (IOL) _
POUT-1.2 Output IOLPOUT
100kHz Output 10Lloo'kHz
LD Output IOL LD f VOL=1.0V 0.3 - - mA
DO - l, 2 'Output IOL D0
(D0 Tri-state Leakage)
Current M
' '. "H" Level ITIgID0 VDD=9-0V - - 100 nA
Leakage
Current T
- "L" Level ITLLDO - - -100 nA
Feedback résistors at
m_XT and PIN , Rf - 100 250 500 kit
Note: Temperature range of Ta=-30 N 70''C nd fill thé_items marked with *.
C"ra1'J'/ii:l'/2ll 'Cl,"3aTh""' i;ta"ag'//l:ra",ra"g,"aa' rara"araxtsx;raiAurMo DIGITAL IC
TOSHIBA: '.iii.'i'iii'ii'ii'y7ls? DE
35.1"? -. "sCrivLN' =.::"5.4.~r: arr: ".ca-nexc=v--- - Hm,"
DE t '1U'1KELI? DUNS”? 3 i'i1'i"i'-'r"x-"_-r"r"-"C, _'"'
TchZSIP _))))):); f‘ “MFQN
BLOCK DIAGRAM
1ookRa
I _ Tri-state Buffer
_ Reference R
Reference Frequency Divider i) Frequency - o-I
_ 7 _ Selector Phase
z''S B rater
I I I L,
ProFrammablP Countqr
I . Pour
i? i) -1 ii1 i) [:5 control
XI X10 X100 X2000 Mode OUT-l
Digit -Digit Digit Digit Setting
Latch Latch Latch Latch Latch
GP 94;:qu
czrr',ter,t"' i)) Address .
r Decoder‘
Selqctor
'LOAD A B O D
t3ND VDD
FUNCTIONAL DESCRIPTION OF EACH BLOCK
1 m- 1. REFERENCE FREQUENCE ""HR , . - ' 1 T ."- - _
1) The reference frequency divider consists of the crystal oscillator
k. . ampIIfier having externally connected 9.0 MHz crystal and the frequency
divider which divides the oscillator output to generate the reference
frequency.
I .m Mr - Ayn:
vu- nun: umww-umu- m;-w-nuum.u-mmmmwwwnmu
M... 'd."dl'J. nu... i.- .m "_.A""_.r"0"b-.""
._y ”w. mm -m
. ~I~ou pm I»...
i'irri'i'ii'ii .c.'rr,s..lri.'j.y,i_'l, "iri:ririiirir"'ir'"ff''f:]
T0911 ':uiiiiii:oi'
ici)-. 17
Frr"y-r, _ ."
’57 r.» a.» 411.10 _
TC91253P is provided with the follbwing six kinds of reference
ffequencies to enable tarbe applicable for FM/LW/MW/SW and TV.
Table . 1
Mode w Sil AM2 ANI FM TV
Frequency Division Factor 9000 _1800 1000 _900 720 576
Reférence Frequency [kHz] 1.0 5.0 9.0 10.0 12.5 15.625
2) One of reference frequencies is selected by the signal from the data
iatch for mode setting and fed to the reference ihput of the phase
. comparator.
3). The amplifier fbr crystal oshillator ls equipped with the Bias resistor
making the external circuit very simplé as shown in Fig. l.
Cristal t 9.00MB: RC-18/u Type
CL t 33pF
T". c' -";‘ _Fdg.1.
. '. _ 1,
4) The' output termigél for i00 kHz is éeparately provided in "the réferénce
frequency divider and this signal can be utilized as the clock of micro
processor which is the controller of TC91258P. _ _ _
100 kHz signal usually appears at 100 kHz output but 125 kHz signal will
be seen only during TV mpde. . _
I'lllnl'filfl‘fl‘kw'l'1"WWfllllleulmu'n“ufll:“'llrfilull=‘l4llflfllmlldh IIIMfl-IllulllI-Illllh'IIIIIVIIIIlI-IllHUIIIIIJIlll-IDI
I L T -I=.,
1_>E[| _'i'i'ii,.',i,"i_i',iii,'f,i'i'','] UDL?6H'=I 7 Ta:zaucavyi.
TOSHIBA1 ELECTRONIC Ili?,
2. PROGRAMMABLE COUNTER
I) The programmable counter is the frequency divider which can control
the frequency division factor aceordtng to the program data given
externally and has the arrangement of four BCD digits (16 bits).
2) Since the programmable counter' of TC9125BP ie especially high speed,
1/8 frequency divider can be used for the prescaller of FM receiving.
3) The frequency division range of TC91253P ls
Frequency Division Factor N " 80 N 9999
and the frequency division factor ls same as the program data given by
the controller.
Therefore, there L, the difference which corresponds to the intermediate
frequency in PLL of receiver between the receiving frequency and the
oscillating frequency of VCO (local oscillator)to normally control the
local oscillator, and the frequency division offset which corresponds
to ll? frequency is controlled by the controller side for TC9125BP. .
k) The frequency division output of the programmable counter is fed to
the signal Input (S) of the phase comparator and compared with the
output frequency of the reference frequency gividet.
5) And this frequency divider output is fed to the POUT control circuit
where the signal is output to programmable counter output terminals
POUT'l and Pour-a. By utiliiing theee twc termihals, dedicated prescaller
TD6102P is controlled to provide the capabilities of IF fine tuning for
P. receiving and 50 Pie, channel step for European areas.,
Detail of this operation is described later.
. "em' 'dl,",,''"',",.',':'.',,'.", Tah",,",,'
nmn-nnu mm.
.uu- - o S H I BA" """ mum 1-1. unmuumn nu
.w." i m... unII-nu‘n -HF".4trq a- rtH
TOSHIBA:
Ii=t:.gil,tl,'li.rt.ty,j,i)i,y,' BE DE ‘iD‘i'EH? UUL?BSD 3 fr,
"a L-cu .. -
H\ ngfigip sl-,
3) Output pf Y? Terminal
6) As frequency input terminal PIN of the programmable counter ls equipped
with a self biased amplifier, the Input signal is given through capacitor
coupling and small amplitude is enough for proper operation.
PHASE COMPARATOR
The phase cohparatbr is the circuit block which compares the phases of
reference frequency divider output and programmable counter output and
controls VCO through the low pass filter to coincide the frequencies
and the phases of these twp signals.
1) Outputs of DO-l and Do-? Terminals (CMOS Tri-state Outputs)
a) When the phase of programmable counter frequency divider output
_ lags behind that of reference frequency, DO-l and DO-2 outputs
become "L" level by turning on N-channel FET's for the period
equivalent to the phase difference.
b) 0n the contrary, when it leads, DO-l and DO-2 outputs become "H",
leve1.by turning on P-channel FET's for the period equivalent to
the phase difference.
c) For the tjeriod when none of the aboves are seen', DO-l and Do-2
outputs have high Lnpedartce"by turning off both N-channel and
P-channel FET's.
2) Ag TC9125BP is equipped with two tri-state outputs DO-l and 00-2, two
sets of low pass filters can be used without switching and the constants
of low pass filters can be set to the optimum values for the multi-band
.- application/L-------.,--.---.. <¢.,h._. -
e) LD terminai is provided to detect the unlock operational state of
PLL loop, .
IAUDID DIGITAL IGH'nzx
TOSHIBAn iiiiiiiiiiiiiiii; [IE "..a,1[l1ii,,'j?,ll'i' 001065]: 5
\\\X ______ 'r-rio-l?,
mu..." mu...“ m. e
T6911 ZSIP
b) LD output becomes "H" level for the phase'error time period during
.lock out. (Refer to Fig. 2)
From Reference R Do-?
Frequency Divider Phase
Gompa rator
From Programmable 8
Counter
CIRCUIT. 0F PHASE COMBARATBR BLOCK
FIG. 2
lo. POUT CONTROL CIRCUIT .
I) TC9125BP is equipped two programmable counter outputs POUT-l and POUT‘Z
and the output conditions of these two are controlled in the POUT control'
circuit by the signal from the reference frequency data latches.
2) The signals of Poor-l and POUT'2 are output with different phases each
other as ehown in Fig. 3,
- . _ , rour-10riirf
POUTj2(Sigz
OUTPUTS 0F Poinrl AND Pour-r
.m II"
.u. .m
mulllmuI-mm [mum-
muu ......... m. ""....".
TOSHIBAu
ELECTRONIC ma 'DE tiii/iF/ri-ii' onmvase 7 [f;w.;h_
\\ _'l'/pfl,.l..1,;li! 25181? c" _ ii
5. DATA LATCHES
Because the noise setting data for reference ftequency selection and
POUT control and the data to set the programmable counter frequency
division factor are input from four input terminals A through D in 4
bit serial for TC9125BP, Abits f 5 latch circuits are provided in
LSI aere the program data ls stored being converted to parallel.
As the circuit threshold voltage of program Input terminals A through
D and LOAD has been set low eliminating limitation of power supply
iroltage for connecting micro co;nputer as its controller, it can be
direetly connected without any interface circuits.
The configuration of data latches ls ab shown in Fig. 4.
When the binary Input signal from A through D is from 11 (hexadecimal
B) to 15 (hexadecimal F), LOAD;signa1 is sent to the address latches
through the load selection cirduit and the data ié stored in the address
latches. Then a data latch corresponding to the input data is designated
by the address decoder.. _
And when the input from A through D is O N 9, LOAD signal ls sent to
the data latches' and the Input data ls stored in the data latchs'
designated by the address decoder.
”.7; thus. . '
ttr-r-trrp--
"imrttou.rqgrrtrr-
';fC'i'i"ir'iiii'i'i'''iC,' i.,1')i'i5i'.iii:'iiiiiriii: " DEE “HJ'HEH? ir/ir/iris 'i, ii-F-'-"-'''-'.'-"-'-"
'/.r,iiiiii"iiii'iiiiii_" \ _" T""'.')'"".
Programmablm Counter
To Reference
Fraqency Selector
and POUT Control
--'---,
2am 8X0
1000 4000
10 20 40 80
D AB ABCD5
Di i X
Di i X
Address
Decoder
electo
B G D LOAD
Fig. 4 CONFIGURATION OF DATA LATCH
. RECEIVING BAND or TC9125BP
TC9125BP has the system structure with high flexibility enabling to
handle all the bands of FM/LW/MW/SW and TV.
:TDS H I BA::::::':: I _
"'"rrut"tR-r""' InmI-u m' nm:- L'.".,",.''..')',,""".",','..'
TOSHIBA-u
.Lt-_,'.~.-_Y_'_ .L... ,._:",.' ac... - -
709125~
- T-50-17
In FM band, receiving with 50 kHz channel epace has beceme possible for
European areas by means of coupled control with dedicated prescaller
TD6102P in addition to domestic P and international FM.
1. The following sir kinds of reference frequencies are provided as shown
in Table 1.
_ 1 kHz, 5 kHz, 9 kHz, 10kHz, 12.5 kHz, 15.625 kRz
The programmable cdunter does not have the frequency division factor
offset., Table 1 shows each receiving band corresponding to reference
frequency, but what reference frequency is need for what band can be
freely selected accordirig to the design specification of micro computer
wh1ch ls to be the controller. In this case, the frequency division
factor offset corresponding. to IF frequency is set accord1ng1y by the
controller side.
-, 2.. If reference frequency of m band is set to 12.5 kHz, 1/8 prescaller
can be used to realize high S/N ratio. The prescaller for TV band is
1/64._
PROGRAMMING OF TC9125BP
l, TC9125BP has the optimum input circuits for using a micro computer as its
, T - _ tMyritrol1tyr aid the programming can be achieved through five terminals,
. A thtquh D and LOAD. . .
LAs thewptegrah data whieh inetruct the operations of TC9125.BP, there are
the mode setting data to select the reference frequency and to cohtrol
the Poli, output and the data to set the programmable counter frequency
division factor.’ These data are Input in 4 bit serial from four
Iii: _ terminals A through D and converted to parallel in. LSI being set in 4.
T bits X p latches.. - V _
AUDIO DIGITAL ICH-m:
TOSHIBA-u ELECTRONIC DE
"'''ii'"iii"ii' 115319 I \\
2. In ofder-to determine in what latch the data is set, the data which 1 1-
“IDENEH? 0019655 E=
Ur:; CCC', _ 57:5:
designates Ehe addresé of iafch ti, Input first, then the data to be set
sin the"1atdi/ii, inpui:.' Whither this Input data is frequehcy division
factor data, mode settidg data or addresé data is automatically selected
in LSI aécording to the contents of A thrOugh D.
The address of each latch is as shown In Table 2.
"iible 2 Latch Address
T m' V . Mode
Latch Digit x 1 Digit x 10 Digit x 100 Digit x 1000 Setting
Address 'F=11 --'. F=12 V F=13' F=1a F=15
Where, F " l-A + 2-13 + 4-0 + GD, A, B, c, D " "1" or "0"
3. Timing'of Program Pvit
Wfln M fr)] _) H n.
Address Data Address Data Address Data Address Data AddressData
desig- set of desig- set ofdisig- set of dlsig- set: of desig- set of
nation. unit's nation ten's nation hun- nation thou- nation mode
of - n c' of " of hun- dred's of thou. sand's of node setting
_ qnit's c-. ten's V _ dred's sand's setting
uA__1_-»-A1- "0'_A2" -1-- A3- 0 Ali- '1' A5
a - _ _ _
Ji' B 1 BI, 'o -‘132 T o B3 _ 1 B4 1 B5
(is,' c 'o ' c1 _ 1' C2, 1 03' 1 cg 1 C5
D 1 D1 I, D2 1 D3 . I. _104 1 . 0
F=ll F=0N9 F=12 F=0V9 F=13 F=0N9 F=14 "F=0N9 F=15 F=0V7
OSHIBA1
ELECTRONIC DE DE iiiiiiiii7; DUL7555 u _:_1:
TCQT ;ltiliy?
- T-50 ii
Data input ls performed in 4 bit binary.
The mode of reference frequency and POUT terminals varies according to
mode setting data A5, B5, cis (D5 = "0") as sihdvri in Table 3.
- Table 3
REFERENCE FREQUENCY DATA REFERENCE
FREQUENCY _ PDUT-l Pomr2
A5 B5 _Cs- [kHz]
0 o o 1 _ Sig. 1
..1 o o I 5 . c, Sig. 1
_ o 1 o 9 . Sig. . 1 _
1 1 o V 10 ' .Sig. 1
o o 1 12.5 , 1 Sig'.
1 0 I 12.5 _ Sig. Sig'.
1 1 1 15.625 _ .Sig. _ s1g'.
"1" indicates that "H" level is retained.
"Sig.'
-. couther. (Refer to Fig, f.),
tdhuna1s A thrdugh D.
and "Sig'." are frequency divided outputs of the programmable
'read data are retained regardless of A through D.
of Program I nput.
the data on A through
tn order to prevent erroneous data read operation at the time of Chang--,
........ m -"Mrr._qiF,
3'..IH"m. .u...': null". .qu .hh
Mt .1: mm»: -t"troit.rrrr.etttr nu
- V _ --69--
Loed signal input Li the ihpiat to Instruct to read in the data given on
While this Input is "l",
D are read into the internal" latches and when it is‘"0", the previously
Ing data on. A through D, it is desirable to give the signal described in
3 Timing
"I'""""""?''' DIGITAL IC
mm“...
Minimum Pulse Width of Input Data
A--D .
Address
Designation
Data Set
zous lop) a0ttf)
MYAB 0
(Fig. 5)
te ls effective for Improving S/N ratio of the radio set to transfer the
input data once Immediately after selection of station and to inhibit
the transfer afterward keeping all of terminals A' through D and LOAD
at "L" level.
Example of Pngram
As an example of program for TC9125BP,the timing chart of A through D
when receiving 82.5 MHz of Japan FM band (reference frequency t 12.5
kHz) is shown in Fig. 6. _
_ Address
desig-
nation
Addres
desig-
nation
Addres
Fig. 6
desAg- Data
nation Set
"13" "7"
Addres
desig-
nation'
ddress
Data desig- Data
Set nation Set
"O" 115" "5" _
Tuirtis CHART OF A THROUGH D
thIl ..... “-7..
mum. "F 'aT/hClt.'
'-ri' TOSHIBAn Ii:LtcTRON'It, " DEB Haven? 0017555 B [I pcs-ii-sr,,.,,,.'
WW”m"’\\'5jt:5_12_555 -
The frequency division factor of programmable counter is 825 - 107 "
7155.5 -'"-. 2 ... -.----.' Il-. '
* There is FM/AM synthesizer controller TC9128P/29P using one. chip micro
Icomputer TCP4620P as the controller of TC9125BP.
FINE ADJUSTMENT " INTERMEDIATE FREQUENCY FOR nt RECEIVING
Since IF freqiieney in FM band of TC9125BP can be freely selected from
seven kinds of frequencies, A25, -50 and +75 kHz around standard 10. 7 MHZ.
. 1 the vari.ations' of IF filters used can be compensated realizing ideal receiv-
ing condition. ' - - F F
This operation' ls achieved by the program data control by the controller
and the combination of TC9125BP and prescaller TD6102P. The operation is
describ ed in detail below.
1.. The basic principles of this operation are as follows.
I) 12. 5 kHz is selected as the reference frequency" of TC9125BP and' TD6102P
is used as the' prescaller.
2) It is required fbr the controller to have the function which arbitrarily
forces the frequency division data sent to TC91253P to be' "-1.
3) When one of POUT'l and POUT'Z of TC9125BP is connect/ed to +25 Le
terminal of TD6102P, the frequency of local qscillator is shifted by
+25 kHz. _
h) Similarly, when one of POUT is conne cted to +50 kHz terminal, it is
shifted by +50 kre, ',' p"
5) When both " +25 kHz and +50 kHz terminals are connected to one of
_ POUT, it Is shifted by +75 kHz; T
nh-mw-rm‘unmr-v-u-
--m "".- m: m... -.. Wm-u.q...».....~u.-umr-..
mnnmmnmuun-mu. ""
'a'T, Gl mm" m m. IllquMJ‘l mu. m "'"'."'"""'" "a.rttkr" .mu. Clll1ll
--71-,
~AUDID DIGITAL ICt:y,arar,
a T091 ZEBP
ifrii':i7i"iiiri; num7a5=1 0 T------,
. "F5047..-
'i.'.''.']']."..]']:)."..)']:.;)])":";'');'".',' ELECTRONIC DE
,Since progremmab1e_counter frequency divider outputs Poinrl and POUT'Z
are output with different phases, if both of these are connected to
.+25 kHz terminal, It is shifted by +50 kHz.
Similarly, if both of POUT are connected to +50 kHz terminal, it is
shifted by +100 kHz.
- 8) If both of PouT-l and Panr2 are qonneeted to both of +25 kHz an +50
kHz, it ls shifted by +150 kHz;
However, the above descriptions are applicable when the frequencw
division outputs exist on both terminalé of POUT-l and POUT‘Z-
When the frequency division data is forced to be -1 by the controller,
the local oscillator is shifted by -100 Pr.
10) In the case‘of domestic FM, when the local oscillator frequency is
shifted by +df, IF frequency will be 10.7 MHz' - " and when shifted by
' ... df, IF will be 10.7 MHz + Af.
11) In the case of international FM, on the contrary, when shifted by + dr,
jIF will be 10.7 MHz +Af and when shifted by df, IF will be 10.7 MHz
2. An example of corineeting T091258? and TD6102P Li shbwn;
The mode setting data sent to TC9125BP are A5 L. "1"
,.B6-= "0" and Cs =
nwmfft)§3l1li3l\
".)'l" (r. = n, V
w- nl-uIlII-ur-amlll -- I,'.",
"tr"'""', yuan ""
TOQlZSBP
- _-fic---, +501:
c, Burt,
Ci) auw-----' . -
o------'"
s-ll----------
TD6102P
Fig. 7 ' _ _
mu. .... nu uu- mum" 'u-'" wk“:
.0. "mu. ww-‘Mum 0......
_'"'"'''""'''"""'''"''."""-":"'-"'-'')''')''" .' T \\\
.1». van: .eEEi2i' ISM'.
ELECTRONIC ma DEI '30T?iyl'i"tlClh'MO a
“c #3; "tre
_TOSHIEA1
T. Connections fpr pefforming seven kinds of IF fine adjustments in Fig, 7
are as shown in the table below, . . . _.c . _ " . "
Table 4 _ T
DESIRED IF FREQUENCY DOMESTIC ht INTERNATIONAL FM
_ FREQUENCY- FREQUENCY
IF M1tel A IF [kHz] Cir) DIVISION» (ii) DIVISION
_ ' _ FACTOR - 1 V FACTOR - 1
10,775 . +75 I o 0 o 0
10.750 +50 t) o 0
10.725 . +25 0 0 _ 0 ti
10.700 0 .
10.675 V -25 o o o 0
10.650 -50 _ o 0 _ 0
10.625 -75 o o 0 V 0
(Notes) 1. . in the columns of (ii) and indicates that switch (ir)
and/or switch CBI, should be turned on.
2. 0 1n the. column of Frequency division factor-l indicates
that the frequency division data sent to TC9125BP should
be' -1 shifted by the controller.
P. IF fine adjustment can pg aqh_ievéd wiEh '50. kilz Channel Step in FM Band
in Europe, but It is explained in the item of 50 kHz Channel Step.
_hiix,iri.). iiiiii'iiiiiiii' _,','ii'i'i,1'a,l?,iii,'ii' t"
- =='c=r-tr-='r-'"u'crx
ELECTRONIC 'iiii'
HEQSHIBAI
“TOSHIBA"
. Fr Fine Adjustment withoyt -l Shift Function in Cohtroller
As described above, it ls required to have the function which performs
-1 shift of frequency division data in the controller for seven kinds
of IF fine adjustments, but it ls also possible to achieve IF fine
_ adjustmen£_without this function. In this case, however, there are
five kinds of IF fine adjustments.
_ The controller should tiso. designed that the frequeney divieion data
- to TC9125BP in FM band has been -1 shifted from. the actual frequency
d ivision 'data in advance.
Namely, the frequency division data in FM is always.programmed 1n
109125131, with the _value shifted by Ly. _
The mode setting data of TC9125BP shall be A5 = "1", B5.= "0" and
C5 = "I". V
Connection of T091258? and TD6102P is shown in Fig.8.
- © -rsrN--
_ tl " K +50k'
G) AMrN--
POUT-Z v/c4%< +2tilt
POUT‘l 45/
i'c' I-I "cg _ " _ , Pw-u-lr-r-r . _ . 'I‘FQUT - ..
.rs. x au,.' -.I '.V{r0912513r;:u l ri-. _ TD6102P
"r-.--.' " Fig. 8
' Table 5 shows the connections for performing IF fine adjuétment
1 without the contfoller having the function of shifting the frequency
, division data by -1. -
n--IIII In "" I: P///d',.W.". I" 'u"oPNr"H"
.I..IIII I manna"...
'T/d',.'.''.'"','',,",', III Cl','.','.',',', II-
TOSHIBA1
ELECTRONIC DE_
_".(,'l''i"i.f:r1'lircil'l','ii'i'l") _U
T891253?)
iusiiji,
Table 5
' DESIRED IF FREQUENCY .DOMESTIC FM -INTERNATIONAL FM
' MHz] mm] 0) © G) Ciiy (0
10.750 +str," 0 o 0
10.725 +255 0 0 0
10.700 0) 0' 0
. 10.675 -25 o o 0
10.650 .-50 0 0 0
0 Indicates' that the respective switch should be turned
APPLICATION OF 50 KHz Channel Step in FM Band
The channel space of domestic FM and international FM is 100 kHz,
however, there are some areas 1n Europe where the.spécing is only 50 kHz.
TC912SBP can be used in the ragio sets for these areas. And IF fine
adjustment with_50 kHz step can be achieved.
'1. Basie operatioi of TC912582 with 50kHz channel step ls as follows.
1)"As sihova' in Table 3, the:outpul of POUT'l terminal of TC9125BP can be
_ turned on/off by the signa1 of" mode setting data A5 keeping the,
reference frequéncy at 12.5 kms."
Namely, when A5, B5, 95,: -1', O, l, the frequency division output
sig/al appears 6n POA-r-aid when Air, B5, C5 = 0, 0, 1, the frequency
division output stops keeping POUT-l at "H" level.
"".B"."'rq00t"-"
...n...-.mm..u..n..u
i." L7s,--
1:... .%"ah'a"//.'A''/r',r, srazarsrsa"avxrcacz0ug DID DIG ITAL I Ctr/a
1.. 4. mm-n unwary»! . -:.-
'iirr''ii"iTiF" l 'lf-ll-il-li-.
T 50.. 17
- TOSHIBA-I 'iiiliiii'iii'iiiii'i:' n'a 'iii'i")"i' =1m7au7
2) When the frequency division output of programmable counter ls connected
'to +50 kHzterminal of presea11el, the local oscillator frequency is
shifted by +50 kHz and consequently. the receiving frequency is also
shifted by +50 kHz . _
2. Thetefore, Pour-l terminal and_+50 kHz terminai of presealler is
conhected togethet. If the programe data ls varied in suéh manner that
.A5 = "0" with the frequency division data ls N, then A5 = "l" keeping the
date tias it is, and A5 " "O" at the same time as N is stepped up to N+1,;..
the receiving frequency can be scanned with 50 kHz step.
T Frequency T . _ _ . = '*'
Division Nr-zitxyt Nrrc1008 N=1009 ' N=101p l l
Factor B5 = 0
*As .---
Receiving
Frequency 90.00 90.05 90.10 auf 90.20 90.25 . 90.30 MHZ]
3._ IF Fine Adjustment with 50 kHz Channel Step
1) IF fine adjustment of TC9125BP Is further advanced 1irov1dtng two program-
mable counter frequency division output terminals (POUT-l and POUT-Z)
enabling IF fine adjustment with 50 kHz channel step for European areas.
Namely, always connecting POUT-I terminal to +50 kHz terminal, as
previously explained, if POUT‘Z terminal is connected to +25 kHz or
+50 kHz terminal, seven kinds of. ir fine adjustments can be achieved.
2) tn order to achieve fine adjustment of negative side, the controller
is equipped with the functiqn that the programmable counter frequency
division data to TC9125BP in FM band can be arbitrarily decremented by
"xe:sr""idliiiuiirx:
',diiii'ii'i'iii"i'i'ii'ii,' Jia-lr-ali,,',,'],',!,),.!,),,!).!,.),?.;:, DE DEI '',',l'iii,',i,'.,?,,,,)l',,t'i,,:li', UDl?El:.'-l 3
3) Fig. 9 Illustrates the connection of IF fine adjustment with 50 kHz
channel step. . . g _--'
. C) o-----)"
_ FMIN -
Pom“2 ''l'n _ AM N
Pom"1 g ' JN. e
ft50lt
Pw-F---------------:;
T091253? Tps102p _ . -
FIG. 9 _ CONNECTION FOR IF FINE ADJUSTMENT.
- 4) The connections to perform seven kinds of IF fine adjustments in
Fig. 9 ate as shown in Table 6.
- Table 6
DESIRED IF FREQUENCY 50 kHz STEP FOR EUROPEAN FN.
' FREQUENCY
IF [MHz] g IF [kHz] V G) Tgg/tl,
10.775 +75 . . -0 0
10.750 +50 , _ 0
10.725 +25 0
_ 10.700 _ w. -,. o
' 10.675 -25 o o 0
10.650 " _ _ -50 0 _ 0 i
- 10.625 ". _ .-75 _ w" -- _ o
-.--mu Mum.“ I'm! ',3ra'alrld M".
.u...-..-u..u .m mnuunqu-mmu u um um G'ara",G ',."/cil,"J,',','t/G,'', '"a,'ll
AUDIO DIGITAL lczmnnrr:
TOSHIBA-I ELECTRONIC DE DEI] =10=17eu7 ljD-176l35 5 Ir,'
709125 "'1_ii1iiiiiii"_i' _ "it.',
(Notes) 1. 0 in the columns of (li) and indicates that
switches Ch) and/or0)should be turned on.
2. O in the column of frequency division factor ,-1
Indicates that the frequency division data sent
to TC91253P ls ul shifted by the controller.
CONFIGURATION 0F ACTIVE LOW PASS FILTER
The low pass filter of PLL is to convert the digital output from the
phase comparator to analog output voltage, which co'ntrols VCO.
As an example here, active low pass filter with high Input Impedance
obtained by Darlington connection of FET and NPN transistor is show’n.~
T0 V00
From-IDoi-l or R1
DOT? Of T09125BP
ir- - _. -
%. m... _ _. ,FIG. 10 Low PASS FILTER CIRCUIT
(Notis) t . Althoigh TC9125BP is equ'fpped with-Itwo terminals of phase
comparator outputs, it L, not required to uie both of them.
IIIII nII- 'IIL'DIVI II- 'd'2%"dgr.,lh' U''.".'.'?,',',','.'.' s".".'','.', ,'llll,":,''C, Ir" ','d'/"T."C, T/a", .III V''"" IIIIII I-III ~II-I IIIIII-I Ir- III-IIIIII-I DI‘IIVIUIIWUIF' '/ie',,"/t"d: II- 'ig,T, IIIIII- 1"yglllr.'. II Cl',,',' IIIIIIIII II -II ''.'.",l'.e'C1li'i.''.".'..':
......................... I..I..-..IIIII I.II....III ".I.... .I.. II........IIII III...I.....I II...I. .I.... "r....-" II...». ..III II... ........... II...“
WTOSHIBA‘J
q Mr, Vin:- (i‘huyi XM E
HF_T.<>§H;§_AJWVELEC7511331;Luau saysfrcuocriwcir 001.7555 7 lrrcr,r,r '
. - _ T891 25BP ',1
_ _ _" T-50-17» '
- ' - d l; I
M 3 GE !
- V ' g 38. 5
ii, a 'sh':,!.
tt 3 ' § fi' 'i,'.
. . . " v
T-- l--------, __ . 503 g
. _ K. g
ii i' 2 e2? '
. 'l, a a
'E 3 A-EL
'i-,' l 8 a 5"
m 'd h'
'st': rd N a H g
ti h E: 51 'ii g
i,',-',
a. E N AM-
E a E g
. m _ >
' 2; h
, -M- '. 7 ij<-_ HIA- c-,- . :3
'iii., V i' a” to L‘ g
:::r:.::::::.1::::r.:::::::::mm::z::::::::r..'.:::::1::: , si::a:rcar, mr . ::u::r.::AUD[D DIGITAL "2rrcrc .
." T _ ' f. i.' -N-
'rxaEmgrrrsi-- n. x , r 1 i “J
TOSHIBA-n ELECTRONICD
r. ;-.:.1-,...L..‘.i
iitsyll HU‘WEH? DDL?BE? =1 _,.,-,'lr'-rrr-"'
VDD (V)
. o. 11.1- : Hm
hdrm m.
r'raT-'rdrdh'c: m...- “min MIA! """ m m_wn-
l VDD - fMAX Ta - fMAX . - -
l? v 70v
_ . DD"' .
"it Tar--, 25 c_ 335
g VIN =‘L7p-p VIN=MVp-p
ty" 20 - N=4008 g g q N=4ooa
x» g p: '''iso N.
E m 8 "N,
g . [il "s.
o? 25 " - - g 25 ' ,
tl ti m
rs. l h ea
c E " 3%
:5 '8 J H o Nc
ED M £020
m tl a _
8g ly a "s,.
Ea? le. . E ii,,
3% m" ht,
10 ' .
2 l 6 a lo 12 -eo ~30 0 so 60 90
OPERA'lfING POWER SUPPLY VOLTAGE VDD (v) - AMBIENT TEMPERATURE Ta Co)
VDD - IDD _ VDD - Vth
A 25 95 .
g m =25‘c V Ta=25'C
VIN ---vi'v-p ts (A~D , LOAD)
9 N=,4008 V
.9 RD _ el
X-ta2r= 9.0mm g o I
m''l VIH "
H 3: g I I. _
E 15 f -15MHz El: 3 I e-'"
co 7’ _ ('ili, "
Fd . _' _ _
a - . / A =10MHz _ 0 m -
m 10 7 B: A 2
D - j _ I / - _ (a ta'-;
m ',sr' wk / . l T _ EH 1/
e, t I Tag -
5. l d// ' _ H H "e''"
F4 2 I _ H _
5 " D Fe 1
a o th .... I
t a g w...)------
'l'"' "-- - . T'
o V o _ I
2 _ l ', 6 a 10 12 2 l T _ ti _ e 10 12
OPERATING POWER SUPPLY VOLTAGE OPERATING POWER SUPPLY VOLTAGE vDD oo
......y-..... "M..." q... T/at:.",,":.''"',",,',",',',',.",,',',".,',',.'',,'',,'.' ...... nun
- 7. ,1. . ubwaMbwn-v’a mtfl'qfll
.m. n. ,1
www.ic-phoenix.com
.
