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TC58256AFT
256-MBIT (32M x 8 BITS) CMOS NAND E PROM
TC58256AFT Program/Erase Cycles 1E5 cycle (with ECC) Access time
Cell array to register 25 �s max
Serial Read Cycle 50 ns min Operating current
Read (50 ns cycle) 10 mA typ.
Program (avg.) 10 mA typ. Erase (avg.) 10 mA typ.
Standby 100 �A Package TSOPI48-P-1220-0.50 (Weight: 0.53 g typ.)
TENTATIVE TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
256-MBIT (32M � 8 BITS) CMOS NAND E2 PROM
DESCRIPTION The TC58256A is a single 3.3 V 256-Mbit (276,824,064) bit NAND Electrically Erasable and Programmable
Read-Only Memory (NAND E2 PROM) organized as 528 bytes � 32 pages � 2048 blocks. The device has a 528-byte
static register which allows program and read data to be transferred between the register and the memory cell array
in 528-byte increments. The Erase operation is implemented in a single block unit (16 Kbytes � 512 bytes: 528 bytes
� 32 pages).
The TC58256A is a serial-type memory device which utilizes the I/O pins for both address and data input/output
as well as for command inputs. The Erase and Program operations are automatically executed making the device most suitable for applications such as solid-state file storage, voice recording, image file memory for still cameras
and other systems which require high-density non-volatile memory data storage.
FEATURES Organization
Memory cell allay 528 � 64K � 8
Register 528 � 8
Page size 528 bytes
Block size (16K � 512) bytes Modes
Read, Reset, Auto Page Program
Auto Block Erase, Status Read Mode control
Serial input/output
Command control
PIN ASSIGNMENT (TOP VIEW) PIN NAMES NC NC NC NC I/O8I/O7I/O6I/O5NC NC NC VCC VSS NC NC NC I/O4I/O3I/O2I/O1NC NC NC NC
NC NC NC NC NC GND BY/RYRECENC NC VCC VSS NC NC CLE ALE WEWPNC NC NC NC NC
000707EBA1
