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TC55V2001FI-85L |TC55V2001FI85LTOSN/a16000avai262,144-WORD BY 8-BIT STATIC RAM
TC55V2001FI-85L |TC55V2001FI85LTOSHIBAN/a18000avai262,144-WORD BY 8-BIT STATIC RAM
TC55V2001STI-10 |TC55V2001STI10SECN/a120avai262,144-WORD BY 8-BIT STATIC RAM
TC55V2001STI-10L |TC55V2001STI10LTOSHIBAN/a1400avai262,144-WORD BY 8-BIT STATIC RAM
TC55V2001STI-85L |TC55V2001STI85LTOSHN/a925avai262,144-WORD BY 8-BIT STATIC RAM
TC55V2001STI-85L |TC55V2001STI85LTOSN/a91avai262,144-WORD BY 8-BIT STATIC RAM


TC55V2001FI-85L ,262,144-WORD BY 8-BIT STATIC RAMTOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L262,144-WORD BY 8-BIT STATIC RAMThe TC55V2001FI ..
TC55V2001STI-10 ,262,144-WORD BY 8-BIT STATIC RAMTOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L262,144-WORD BY 8-BIT STATIC RAMThe TC55V2001FI ..
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TC55V2001FI-85L-TC55V2001STI-10-TC55V2001STI-10L-TC55V2001STI-85L
262,144-WORD BY 8-BIT STATIC RAM
TOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
262,144-WORD BY 8-BIT STATIC RAM
DESCRIPTION
The TC55V2001FI/FTI/TRI/STI/SRI is a 2,097,152-bit static random access memory (SRAM) organized as
262,144 words by 8 bits. Fabricated using Toshiba's CMOS Silicon gate process technology, this device
operates from a single 2.7 to 3.6 V power supply. Advanced circuit technology provides both high speed and
low power at an operating current of 3 mA/MHz and a minimum cycle time of 85 ns. It is automatieal%Caced
in low-power mode at 1 PA standby current (L-Version at VDD =3V, Ta=25°C) when chip enable (CE1) is
asserted high or (CE2) is asserted low. There are three _c_g_r}trol inputs. IyET and CE2 are used to select the
device and for data retention control, and output enable (OE) provides fast memory access. This device is well
suited to various microprocessor system applications where high speed, low power and battery backup are
required. The TC55V2001FI/FTI/TRI/STI/SRI is available in a plastic 32-pin small-outline package (SOP) and
normal and reverse pinout plastic 32-pin thin-small-outline package (TSOP).
FEATURES
0 Low-power dissipation 0 Access Times (maximum):
Operating: 10.8 mW/MHz (typical) TC55V2001Fl/FTl/TRl/STl/SRl
0 Single power supply voltage of 2.7 to 3.6 V - 85, - 85L - 10, - 10L
o Power down features using CE1 and CE2. Access Time 85ns 100ns
0 Data retention supply voltage of 2 to 3.6 V - .
0 Direct TTL compatibility for all inputs and CE1 Access Time 85ns 100ns
outputs E Access Time 85ns 100ns
0 Standby current(Ta=25°C maximum) OE Access Time 45ns 50ns
TC55V2001Fl/FTl/TRl/STl/SRl q Packages: .
-85,-10 -85L, -10L SOP32-P-525-1.27 (FI) (Weight: 1.06 g typ)
TSOP I 32-P-0820-0.50 (FTI) (Weight: 0.34 gtyp)
3.6V 3 tzA 1.4szA TSOP I 32-P-0820-0.50A (TRI) (Weight: 0.34 gtyp)
3.0V 2 ,A 1 prA TSOP I 32-P-0.50 (STI) (Weight: 0.24 gtyp)
TSOP I 32-P-0.50A (SRI) (Weight: 0.24 gtyp)
PIN ASSIGNMENT (TOP VIEW)
0 32 PIN SOP o 32 PIN TSOP
A17 1: 1 V 32 TI V (Normal pinout) (Reverse pinout)
31 id?
212 E , 30a CE2 flllMllllllllllllmll
A12 C 4 29 TI 16 1
A7 |: 5 2821 A13
A6 I: 6 27 Cl A8
A5 1: 7 26:1 A9
A4 I: 8 25:1 Alf
A3 TE 9 24:1 OE
A2 I: 10 233 m
A1 E 11 22:1 CE1
A0 C 12 21:1 1/08
1/01 I: 13 20: I/O?
1/02 I: 14 19: l/O6
l/O3 |: 15 18:1 |/05 17 32
GND C 16 17 El l/O4 [lllllllllllllllllllllllllllllll
PIN NAMES
A0 to A17 Addresslnputs PINNO. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16
l/YY Read/Write Control Input PIN NAME A11 A9 A8 A13 R/W CE2 A15 VDD A17 A16 A14 A12 A7 A6 As A4
OE Output Enable Input
@1052 Chip Enablelnput PINNO. 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32
um to l/O8 Data Input/Output PIN NAME A3 A2 A1 Ao I/OI IIOZ I/O3 GND I/O4 |/05 I/O6 I/O7 I/O8 W A10 E
VDD Power
GND Ground
961001EBA1
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operatin ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and con itions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
1998-03-30 1/13
TOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L
BLOCK DIAGRAM
£2 3 3 3 -OVDD
LLI Lu 1.”
tl, g gr, g MEMORYCELL HGND
A12 g 'it,-',' 9:3 ARRAY
mg I' 8 2048x128x8
A15 E Em Bu (2097152)
tif p, 2: 23
l/OI SENSE AMP.
5' COLUMNADDRESS
o < c LUMNADDRE
l/O8 'lil
L”; COLUMNADDRESS
A0 A2 A9 A11 CE
A1 A3 A10
OPERATION MODE
MODE W CE2 E R/W l/OI to l/O8 POWER
Read L H L H DouT IDDO
Write L H X L DIN IDDO
Outputs Disabled L H H H High-Z IDDO
H x x x High-Z I s
Standby . DD
x L x x High-Z IDDS
Note: x = don't care. H = logic high. L = logiclow.
ABSOLUTE MAXIMUM RATINGS
SYMBOL RATING VALUE UNIT
VDD Power Supply Voltage - 0.3 to 4.6 V
VIN Input Voltage - 0.3* to 4.6 V
l/vo Input/Output Voltage - 0.5 to VDD + 0.5 V
PD Power Dissipation 0.8 W
Tsolder Soldering Temperature (10s) 260 ''C
Tstrg. Storage Temperature - 55 to 150 "C
Topr. Operating Temperature -40 to 85 ''C
* - 3.0 V when measured at a pulse width of 50 ns
1998-03-30 2/13
TOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L
DC RECOMMENDED OPERATING CONDITIONS (Ta = - 40° to 85°C)
2.7 to 3.6V
SYMBOL PARAMETER MIN TYP MAX UNIT
VDD Power Supply Voltage 2.7 - 3.6
" Input High Voltage 2.2 - VDD + 0.3 V
" Input Low Voltage - 0.3* - 0.6
VDH Data Retention Supply Voltage 2.0 - 3.6
* - 3.0 V when measured at a pulse width of 50 ns
DC CHARACTERISTICS (Ta = - 40° to 85°C, VDD = 2.7 to 3.6 V)
SYMBOL PARAMETER TEST CONDITION MIN TYP MAX UNIT
u. Input Leakage Current VIN = 0V to VDD - - i 1.0 psA
IOH Output High Current VOH = VDD - 0.5V -0.5 - - mA
10L Output Low Current VOL = 0.4V 2.1 - - mA
ILO Output Leakage Current ct"==): C7, ZJIEOOQEIDW = " or - - i 1.0 prA
7 VDD = min - - 35
CE1 = vIL and CE2 = VlH and 3V , 10% Tcycle m - - 10
Ioryo1 MN = ve, IOUT = 0mA V = min - - 40
Other Input = VIHNIL 3.03% i 0.3V Tcycle 1/15 - - 12
Operating Current . mA
m = 0.2V and VDD = Tcycle mm - - 30
CE2--VDD-0.2V 3v:10% 1,15 - - 5
'DDOZ MN = VDD - 0.2V, IOUT = 0 mA VDD = min - - 35
Other Inputs = VDD - 0.2 wo.2v 3.3V i 0.3V Tcycle 1,15 - -
bios, E = VlH or CE2 = I/w. - - 2 mA
o -85, -10 - 1 2.5
Voo = Ta=25 C -85L,-10L - 0.5 1.2
3Vt 10% o o -85,-10 - - 55
Ta-- -40 t085C -85L,-10L - - 35
a -85, -10 - 1.5 3
7 VDD = Ta = 25 C -85L, -10L - 0.7 1.4
1m,$2 Standby Current CE1=VDD - 0.2V 3.3V 10.3v -85,-10 - - 60
(Note) or CE2 = 0.2 V Ta = - 40° to 85°C -85L, -1OL - - 40 pr/k
VDD-- 2.0 to 3.6V -85, -10 - 1 2
Ta = 25''C -85L, -10L - 0.5 1
-85, -10 - -
VDD =3V Ta-- -4(y'to4ty'C -85L,-10L - -
o o -85, -10 - - 50
Ta=-40 to85C -85L,-10L - - 30
Note: In standby mode with m 2 VDD - 0.2 V, these limits are assured for the condition CE2 i VDD - 0.2 V or CE2 s 0.2 V.
CAPACITANCE (Ta = 25°C, f = 1 MHz)
SYMBOL PARAMETER TEST CONDITION MAX UNIT
G: Input Capacitance " = GND 10 F
CouT Output Capacitance VOUT = GND 10 p
Note: This parameter is periodically sampled and is not 100% tested.
1998-03-30 3/13
TOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L
AC CHARACTERISTICS AND OPERATING CONDITIONS (Ta = - 40° to 85°C, VDD = 2.7 to 3.6 V)
READ CYCLE
TC55V2001FI/FTI/TRI/STI/SRI
SYMBOL PARAMETER -85, -85L -10, -10L UNIT
MIN MAX MIN MAX
tRC Read Cycle Time 85 - 100 -
tACC Address Access Time - 85 - 100
tco1 Chip Enable (m) Access Time - 85 - 100
tco2 Chip Enable (CE2) Access Time - 85 - 100
tOE Output Enable Access Time - 45 - 50
tcos Chip Enable Low to Output Active 5 - 5 - ns
tOEE Output Enable Low to Output Active 0 - 0 -
too Chip Enable High to Output High-Z - 35 - 40
tooo Output Enable High to Output High-Z - 35 - 40
tOH Output Data Hold Time 10 - 10 -
WRITE CYCLE
TC55V2001Fl/FTl/TRl/STl/SRl
SYMBOL PARAMETER -85, -85L -10, -10L UNIT
MIN MAX MIN MAX
twc Write Cycle Time 85 - 100 -
twp Write Pulse Width 60 - 60 -
tcw Chip Enable to End of Write 75 - 80 -
tAs Address Setup Time 0 - 0 -
tWR Write Recovery Time 0 - 0 - ns
toow R/W Low to Output High-Z - 35 - 40
tOEw R/W High to Output Active 0 - 0 -
tDS Data Setup Time 35 - 40 -
tDH Data Hold Time 0 - 0 -
AC TEST CONDITIONS
Output load: 100 pF + one TTL gate
Input pulse level: 0.4 V, 2.4 V
Timing measurements: 1.5 V
Reference level: 1.5 V
tR, tF: 5 ns
1998-03-30 4/13
TOSHIBA
TIMING DIAGRAMS
TC55V2001FI/FTI/TRI/STl/SRI-85,-10,-85L,-10L
READCYcI-E(SeeNote1)
ADDRESS X X
_ tacc t0H
CE2 // tcos "N. "K,
"'% tco1
tOE too
E 'N, //
toss tooo
DOUT t VALID DATA OUT
INDETERMINATE
WRITE CYCLE 1 (R/W CONTROLLED) (See Note 4)
ADDRESS
tum tWR
/ tcw W
fig w 7
A tODW tOEW
(See Note 2) (See Note 3)
tos tDH
/(See Note 5) VALID DATA IN (See Note 5)
/h,v,"j2',Di'ir'',',i',',, /
1998-03-30 5/13
TOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L
WRITE CYCLE 2 LLCEI CONTROLLED) (See Note 4)
ADDRESS X
twe tum
CE2 , tcw 'W"
tcos t00w
tos tDH
De: (See Note 5) VALID DATA IN (See Note 5)
WRITE CYCLE 3 (CE2 CONTROLLED) (See N ote 4)
ADDRESS
tos tDH
DIN (See Note 5) VALID DATA IN (See Note 5)
1998-03-30 6/13
TOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L
Note: (1) R/W remains HIGH for the read cycle.
(2) If CEI goes LOW (or CE2 goes HIGH) coincident with or after R/W goes LOW, the outputs
will remain at high impedance.
(3) If CEI goes HIGH (or CE2 goes LOW) coincident with or before R/W goes HIGH, the
outputs will remain at high impedance.
(4) If ttE is HIGH during the write cycle, the outputs will remain at high impedance.
(5) Because I/O signals may be in the output state at this time, input signals of reverse
polarity must not be applied.
DATA RETENTION CHARACTERISTICS (Ta = - 40° to 85°C)
SYMBOL PARAMETER MIN TYP MAX UNIT
VDH Data Retention Supply Voltage 2.0 - 3.6 V
-85, -10 - -
Ta = - 40° to 40°C
-85L, -10L - -
VDH = 3.0V
I s db c T 40°t 85°C -85, -10 - - 50 A
tan rrent a = - o
DDS2 y u -85L,-10L - - 30 /2
-85, -10 - - 60
VDH = 3.6V Ta = - 40° to 85°C
-85L, -10L - - 40
ttrm Chip Deselect to Data Retention Mode Time 0 - - nS
tR Recovery Time 5 - - mS
CEI CONTROLLED DATA RETENTION MODE (See Note 1)
VDD l DATA RETENTION MODE
2.7 V - - - - - ----_
(See Note 2) (See Note 2)
Ihr, --- l /
- / VDD - 0.2V
CE1 tCDR tR
1998-03-30 7/13
TOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L
CE2 CONTROLLED DATA RETENTION MODE (See Note 3)
VDD CC") DATA RETENTION MODE hi,
2.7 v ---------'..------------------------i.---------
" tCDR tR
V - - - -
IL k , 0.2 v V
Note: (1) In (El controlled data retention mode, minimum standby current mode is entered when
CE2 s 0.2 V or CE2 2 VDD - 0.2 V.
(2) When CEI is operating at the VIH level (2.2 V), the operating current is given by IDDSl
during the transition of VDD from 3.6 to 2.4 V.
(3) In CE2 controlled data retention mode, minimum standby current mode is entered when
CE2 s 0.2 V.
1998-03-30 8/13
TOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L
PACKAGE DIMENSIONS (SOP32-P-525-1.27)
Units in mm
'ii2uscsscrvc1s7----,
10 7+0 2
14.13i0.3
(525mil)
_i1ljliierili)ljrrirlrj)
0.775wp " o.3:o.1
21.1MAX
.4 20.6iO.2 pl,
llll L, .
2 8MAX
0,15 :%.05
Weight: 1.06g (typ)
1998-03-30 9/13
TOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L
PACKAGE DIMENSIONS (TSOP I 32-P-0820-0.50)
Units in mm
"E 32 CM.
ID k x
El cu.
TT-T , co
ii-g A Cy
18-4-02 t (E 1.01m
A 20.0:02 ci 1.2MAX
Weight: 0.34 g (typ)
1998-03-30 10/13
TOSHIBA TC55V2001Fl/FTl/TRl/STl/SRl-85,-10,-85L,-10L
PACKAGE DIMENSIONS (TSOP I 32-P-0820-0.50A)
Units in mm
flfififififififififififlfiflfi
0.2i0.1
8.2MAX
7 9i0 1
18.4i0.2
20.0i0.2
0.1i0.05
0.2TYP
0.15 $.05
0.5:h0.1
Weight: 0.34 g (typ)
1998-03-30 11/13
TOSHIBA
TC55V2001FI/FTI/TRI/STl/SRI-85,-10,-85L,-10L
PACKAGE DIMENSIONS (TSOP I 32-P-0.50)
Units in mm
1;? T253323 G 1
C": TIEI 6
III]: Elm]; Y,
cu: ===J. 7.
ar an A if: o C;
CI12 31') Ff g c,
E;- Ee?, f ed 00 ;
DI. K I
Lac :DD
ms: :11: -
EEC ZED
16:1:L a 17-0-
1 1181-01 E 1 0+01 ii,0-1--"05
co' 1.2MAX
1 13.4i02 ' x "
Weight: 0.24 g (typ)
0 ”5.3.055
ho--1oo
1998-03-30 12/13
TOSHIBA
TC55V2001FI/FTI/TRI/STl/SRI-85,-10,-85L,-10L
PACKAGE DIMENSIONS (TSOP I 32-P-0.50A)
3213! 2:131 g'
cad ' +1
cu: gl
(:11: - o‘
:11: :33 V
CH: CCC1TCI-.---'-'=
cm: 333 A
1:11: :1:
EU: :13
CH: ='ICl
:1]: -rr-t
[:1]: CITED
CI Cary I')
El]: :[13
El]: :ILI
17EECL 11:16...
1181-01 _ t
13.4t0.2
Weight: 0.24 g (typ)
8.4MAX
Units in mm
0.1i0.05
1 .2MAX
1998-03-30 13/13

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