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TC5516AFLN/a9010avai2,048 WORD X 8 BIT CMOS STATIC RAM
TC5516AFL-2 |TC5516AFL2TOSN/a957avai2,048 WORD X 8 BIT CMOS STATIC RAM
TC5516APN/a19avai2,048 WORD X 8 BIT CMOS STATIC RAM
TC5516AP-2 |TC5516AP2N/a2avai2,048 WORD X 8 BIT CMOS STATIC RAM
TC5516APLTOSN/a27avai2,048 WORD X 8 BIT CMOS STATIC RAM
TC5516APL-2 |TC5516APL2TOSN/a52avai2,048 WORD X 8 BIT CMOS STATIC RAM


TC5516AFL ,2,048 WORD X 8 BIT CMOS STATIC RAMFEATURES. Standby Current0.2uA (Max.) at Ta = 25°Cl.0pA (Max.) at Ta = 60°Ci.OuA (Max.) at Ta = 25° ..
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TC5516AFL-TC5516AFL-2-TC5516AP-TC5516AP-2-TC5516APL-TC5516APL-2
2,048 WORD X 8 BIT CMOS STATIC RAM
1i''0Siillii?2l WEEDS liiliEliiljlol?ii"f Pl?i0ll)hljgil'e)
TC5516AP/ i, TC5516APL/ f
TC5516AF/- , TC5516AFL/- 2
2,048 WORD X 8 BIT CMOS STATIC RAM
SILICON GATE CMOS
DESCRIPTION
The TC5516AP/AF IS a 16384-bit static random
access memory organized as 2048 words by 8 bit
usmg CMOS technology, ad operates from a single 5
volt supply.
The TC5516AP/AF IS featured by two chip enable
inputs, that IS, CE for fast memo_r_yw access and CC,
for a minimum standby current mode, and is suited
for low power application where battery operation or
battery back up for nonvolatility are required.
Furthermore the TC5516APL/AFL guaranteed a
FEATURES
0 Standby Current
0.2uA (Max.) at Ta = 25°C
l.0yA (Max.) at Ta = 60°C
1.0uA (Max.) at Ta = 25°C
5.0pA (Max.) at Ta = 60°C I TC5516AP/AF
0 Low Power Dissipation 200mW (Typ.)
Operating
0 Single 5V Power Supply : SV :10%
o Data Retention Supply Voltage: 2.0 ~ 5.5V
o Fully Static Operation
I TC5516APL/AFL
PIN CONNECTION (TOP VIEW)
CT-s-e''
25 , 24 D VDD
As 2 23 :1 A3
tdi 3 22 3 A9
A4 4 21 21 R/W
Aag 5 20 CI eTi',
A2 6 19 21 A10
A15 7 " DE;
A0 a " Cl l/Og
1/011: 9 16 31/07
i/oatC " " CI 1/06
1/03: 11 14 D 1/05
PIN NAMES G“: " " 5 1fth,
Ao ~ A10 Address Inputs
R/W Read/Write Control Input
CE I ' CE, Chip Enable Inputs
l/th ' l/Os Data Input/Output
VDD Power (+5V)
GND Ground
standby current equal to or less than 1pA at 60°C
ambient temperature is aviaiabie.
The TC5516AP is also featured by pin compatibil-
ity with 2716 type EPROM. This means that the
TC5516AP and EPROM can be interchanged in the
same socket, and the flexibility in the definition of the
quantity of RAM versus EPROM obtained as a result
allows the wide application in microcomputer sys-
o AccessTime
250ns (Max.): TC5516AP/APL/AF/AFL
200ns (Max.): TC5516AP-2/APL-2/AF-2/AFL-2
Two Chip Enable (6E1,
Expansion and Battery Back Up.
Three State Outputs
Package
Plastic DIP : TC5516AP/APL
Plastic FP : TC5516AF/AFL
BLOCK DIAGRAM cs,
At in O'VDD
A2 8 MEMORY CELL .._0 GND
A3 8 ARRAY
o 123 A 128
d SENSE AMP.
2 tii OLUMN DECODER
I/Oa 0
A, A3 A9 A10
tTE-a) for Simple Memory
All Inputs and Outputs Directly TTL Compat-
TC5516APl-2, TC5516APL/-2
TC5516AFl-2, TC5516AFL/-2
ABSOLUTE MAXIMUM RATINGS
SYMBOL ITEM RAT_ING
VDD ( Power Supply Voltage -0.3V ~ 7.0V
VIN " Input Voltage -0.3V Ps., VDD + 0.3
Vl/O Input/Output Voltage -0.3V ~ VDD + 0.3
PD Power Dissipation (Ta = 85°C) 0.8W (O.45W)'
TSTG Storage Temperature -55''C ~ 150°C
TOPR Operating Temperature -300C ' 85°C
TSOLDER Soldering Temperature . Time 260°C . 10 sec
'Plastic FP
RECOMMENDED D.C. OPERATING CONDITIONS (Ta=-30~85°C)
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
VDD Power Supply Voltage 4.5 5.0 5.5 V
VIH Input High Voltage 2.2 - VDD + 0.3 V
Ihr. Input Low Voltage --0.3 - 0.8 V
VDH Data Retention Voltage 2.0 - 5.5 V
D.C. CHARACTERISTICS fra--- --30-- 85°C. VDD=5V $1096)
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX, UNIT
1IL Input Leakage Current 0 s VIN g; VDD - - 11.0 PA
to l/O Leakage Current Trc, = VIH , OV g VI/O s VDD - - $5.0 PA
kw, Output High Current VOH = 2.4V --1.0 --2.0 - mA
IOL Output Low Current VOL = 0.4V 2.0 3.0 - mA
IDDS1 CC, = 2.2V - 1.0 3.0 mA
' - v 0 5V TC5516APL/ Ta = 25°C - 0.005 0.2
2 - DD - AFL Ta = 60°C - -- 1.0
I Standby Current T = 25°C - 0.05 1.0 A
DDS2 TC5516AP/ a o u
VDD=2~55V Ta=60'"C - - 5.0
Ta = 85 C - - 30
l CE = ov, v = v I = 0 A - 4 7
0001 Operating Current Ct? IN IH NIL' OUT m 0 0 mA
IDDOZ CE, = 0V, VIN = VDD/GND. IOUT = 0mA - 30 55
Note: Typical values are at Ta = 25°C, VDD = 5V.-
CAPACITANCE .
SYMBOL PARAMETER MIN. TYP. MAX. UNIT
CIN Input Capacitance - 5 10 pF
CI/O Input/Output Capacitance - 5 10 pF
Note: This parameter is periodically sampled and is not 100% tested.
TC5516AP/-2, TC5516APLl-2
TC5516AF/-2, TC5516AFL/-2
A.C. CHARACTERISTICS (Ta at --30 ' 85°C, VDD = 5V £1096)
o Read Cycle
I - --] r i - ESBQEZAE {5511 f p E "
I SYMBOL . PARAMETER ' _ C 6A M L UNIT
l TC5516AF-2/AF L-2 TC5516AF/AFL
l - IMHT . w MAX. MIN. 9 MAX.
tRC Read Cycle Time - 200 - g 250 r - ns
V IACC Access Time - 200 j - 250 ns
..--/t‘Co1 ,1) fl CE, to Output Valid - 11p..?.-) - 100 b' ns
ICO2 CC, to Output Valid 1 - 200 - 250 ns
ICOE t% or CTC, to Output Active 10 L - 1O - ns
100 Output High-Z form Deselection - 80 - fl 80 ns ---(
tor-, Output Hold from Address Change 10 - 1O - ns
q Write Cycle
, Tc55urj't2/APL-2 TC5516AP/APL
SYMBOL PARAMETER UNIT
I TC5516AFC/AF L-2 TC5516AF/AFL
MIN. 1 MAX. MIN. MAX.
twc Write Cycle Time 200 - 250 - ns
twp Write Pulse Width 160 - 200 - ns
tAw Address SetUp Time 0 - _1, 0 - ns
twa Write Recovery Time 10 - 1O - ns
TODW Output High-Z from R/W - 8O - 80 ns
IOEW Output Active from RM 10 - 10 - ns
IDS Data Set Up Time 80 - 120 - ns
IDH Data Hold Time 0 - , O - ns
A.C. TEST CONDITIONS
Output Load ' 100 pF + lTTL Gate
Input Pulse Levels : 0.6V, 2.4V
Timing Measurement Reference Levels
Input : 0.8V and 2.2V
Output: 0.8V and 2.2V
Input Pulse Rise and Fall Times 10ns
TIMING WAVE FORMS mc
ORaad Cycle Addmm x VIH Vm vii,
LVIL VIL VIL
tACC . t0H
VIH ttt VIH / /
2 'fjiiRRiR) VIL I) 'i,,jiitfij) 'j,j,tti(i2i'(j,t;
tco1 VIH / fC /
tTE, (iliRRRi2e, v 2titi)j(/(j'i(/" ",r, (/,'t(j'?,
\\ 's, IL 1 A
tcote tOD
tcor: 1
'vor, OUTPUT VOH
OUT kaoL DATA VALID VOL yas---------
TC5516APl-2, TC551 6APL/-2
"rC55rirAfilrf?,"rC5516AFL/-2
q Write Cycle 1
Addresses N‘V'H VIH Vm
kVIL VIL VIL
5E, /-i2iriur'iW//,.to, m,//////7/////%2
twp tWR
1021+ OEWI
DOUT 2iffiii%2fi)fifgEgE tos(3) _
D VIH VIH
IN VIL / VIL
0 Write Cycle 2
DATA IN STABLE
(7)eTi1ttWa; v.H (NN,,,,, Vb/LVIH
“M \\\\\\\\\Q\\\\\
Dour .
O'VVV'
3%.. B)
tDS (3) _ tDH (3)
DIN VIH VIH
DATA IN STABLE
; UNKNOWN
TC5516APl-2, TC5516APL/-2
TC5516AF/-2, TC5516AFLl-2
NOTE: (1) R/W is high for a Read Cycle.
(2) twp is specified as the logical "AND" of CE , CE2 and R/W.
twp is measured from the latter of bt, CE2 or R/NN going low to the earlier of?%,eri2 or R/W
going high.
(3) tDH, tpg, are measured from the earlier of CE CE2 or R/W going high.
(4) If the CE, or CE2 low transition occurs simultaneously with or latter from the RAN low transition
in a Write Cycle l, the output buffers remain in a high impedance state in this period.
(5) If the CEi or E2 high transition occurs prior to or simultaneously with the RAN high transition
in a Write Cycle 1, the output buffers remain in a high impedance state in this period.
(6) If the R/W is low or the R/W low transition occurs prior to or simultaneously with the 5E1 or
CE2 low transition, the output buffers remain in a high__ impedance state in this period.
(7) A write occurs durin_g the overlap of a low CEi low CE2 and low R/W. In write cycle 2, write is
controlled by either CE1 or CE2.
DATA RETENTION CHARACTERISTICS (Ta - .-30s 85°C)
SYMBOL " PARAMETER I MIN, I TYP. I MAX. UNIT
LVDH Data Retention Power Supply Voltage L 2.0 1 - l 5.5 V
i I TC5516AP L/ Ta = 25°C i - F J005 ; 0.2
) l AFL Ta = 60°C l _- i - ' 1.0
l, Ioosz i Standby Current _ TC5516AP/ Ta i 25:C _ I.., , 0.05 l 1.0 MA
l ) AF Ta _ 60°C % - i - 5.0 a
i i i Q8 = 85 C t - j - i 30 i
Ttcon _ From Chip Deselection to Data Retention Mode L O 4 - L - I us
L tn ; Recover Time, - 1 me (1) f - T - us
Note (1) tRC , Read Cycle Time.
v DATA RETENTION MODE
d.5V-- ---_ -.--- -------+
VIH - (2) (2)
- v -0.5V
c 2 ‘con DD tn
Note: (2) If the VIH Icvcl of E2 Is 2.2V, during the period that the VDD voltage is going dawn from 4.5V to 2.7V, 'SSD1 currom flows.
(Ruhr ttt D.C. CHARACTERISTICS or TYPICAL CHARACTERISTIC FIGURES.)
TC551 6AP/-2, TC551 6APL/-2
TC551 6AF/-2, TC551 6AFL/-2
TYPICAL CHARACTERISTICS
Foo vs. Vary
Ta= 2SoC
250- or n Son."
200 r - {LII -
c -i-, - - -
" Go l -
u 4 ti m
<00 (V)
tACC, tcot vs. "
1.a <00 0 4.5V
CL n Soon
t. n.2 \ \
c t ',CC-"
m 'vi'-f
m 1.0 II ACC
m ""'"
Ibo o ao mo
TatoC)
VIH, Vit, " <00
2.6 Ta n 250C
w No \
m <:..
V - r,.,,,..--"''"
E l m r.,,---"'"'
V . --"
vu. -.,..--o--'-'"
w.---"''''''" t
a m m 7
<00 (V)
tcol vs. <00
m Ta u umoo
I i. a or n Son.“
I l, ,
_ j- I 4
m. 4 _
H So I W T
my / l
u u m m 7
<00 (V)
At vs.CL
mo ACC r
<00 n 4.5V
Ta n nmoo
n ore''
no \ -
So woo woo ano moo
cr, (pF)
VIHI V|L(V)
VIH, VILvs. Ta
VIH, voo H 5.SV
(:1. <00 .u A.5V
Ta A00.
.000 vs, <00
TC551 6AP/-2, TC551 6APL/-2
TC551 6AF/-2, TC551 6AFL/-2
<00 (V)
.000 vs. Ts
%u n ov 70 I <00 BV 5.5V
4onnuon 4 CEg no<
E A mo N, I,
b \V m /
No l},
o u a m m I3 o Atl mo
<00 (V) 4109
.000 vs. teyem .009 us. <00
<00 n 5.5V Ta n nman
Ta n nmoa 0.0 I c-E, n 2.2V
go "r"''' other inputs
N _ n I 2V
g A w,,,,),-''''" 9m 2.
o g 1.0
0 mo 1 "
th S vp'''
D Pm "
30 Pu ,,/'''
Ho mb 4 m m 7
n22. (us) <00 (V)
l w _UOM._ " Ta .00MN vs. <00
V n 5.6V
'00 Ta u mmon
CE2 n 2.2V 3.4 II
CE2 n <00 -O.6V
1.4 092 mputs
I u oh I 2.2V ) u n
t... ..n / m
0 D r,..--""
ID [I I Po --..-s
CO _...----"
lac no no u a m m
Ta .on.
TC551 6AP/-2, TC551 6APL/-2
TC551 6AF/-2, TC551 6AFL/-2
'DDS1 (mA)
I0052 (DA)
IDDSI vs. VIN AOIMNV
<00 n 5.5V
otrtar Inputs
fa n tht? 2NM<
" n ”man
1.0 "t
o.m 'ss,
..o 0.0 no.0 4.0 5.0
(.2 AWN». (V)
.UUMM " "
moo leo n 5.6V
CE2 n 5.OV )
100 gr A
u ,/-/'
" t''ty
_UUWM vs, vm Amuv
<00 '= S,5V
M other Inputs
n Ob ?M.N<
" a 25ott
.o m ,
3.0 a.0 so 6.0
VIN (tTire) (V)
tor, vs. <01
<00 I 4.S
" a 2soc
Lo "ss,
lm 'ss,
1.0 2.0 3.0 PO
uoH(u)
IOL " VOL
<00 I 4.6V
_ " n nmoo
" ,//"
VOL (V)
TC5516APl-2, TC5516APLl-2
TC5516AF/-2, TC551 6AFL/-2
OUTLINE DRAWINGS
0 Plastic DIP
24 232221201918 1716151413
14.2 MAXJ
123atiti7tt91oq112
10° 32.4 MAX. x' 15.24 TYP.
‘qusi 0.05 i
17.4 MAX.
2.54 tth26 1.4io.15
Note : Each lead pitch is 2 54mm. All leads are located within0 25mm of theur true longitudinal posmon wnh respect to
No.1 and No.24 leads.
All dimensions are in millimeters.
TC5516AP/-2, TC5516APL/-2
TC5516AF/-2, TC5516AFL/-2
0 Plastic FP
1.2 MIN.
1.5 10.4
HHHHHHHMHHH , «H
24 23 22 21 20 19 18 17 16 15 14 13
1L8i03
3 a 5 6 7 s 9 1o 11 12
0.43 ions 1.27 10.1 o~1.27 0.15 10.05
16.5 MAX
{Dim 4-
.....",
Note : Each lead pitch is 1.27mm. All leads are located within 01mm of their true longitudinal position with respect
to No.1 and No.24leads.
---'- - "_----------- -
TC5516AP/-2, TC5516APL/-2
TC5516AF/-2, TC5516AFL/-2
PACKAGE INFORMATION FOR FLAT PACKAGE
This new flat package is a very small and thin compared with conventional standard dual-in-line package.
Differences are as follows.
1. Difference in dimension between flat and
standard package.
2. Comparison in occupied space.
Unit : mm
Flat package Standard package
Length 16.5 32.4
Width 9.0 14.2
Lead Pitch 1.27 I 2.54
Thickness 2. 1 5
3. Advantage of this package
0 Small dimensions
q Capability of High Density Assembly
o Capability of thin Assembly - Capability of Assembly on both side of PC board.
4. PC pattern layout example
C 2 6.1
ll 1. ll AI
1T -rT 'l Il
" {j 1: tl VDDL'NE
tt I4 l 'l
"/'t",,r 0 " r: o
HW;_ o
='t, ii, ''u?:tu.es-.2fr-- .- Cirtcc-,.=u.
a,.,'---;---.-":,,'?:))) " -,-2,"r, ii i:',
S%=,','i'fi=siE=>:=
.".-"'2T't)?sti"i5-ts--i-i n.4, - x 4: .._
"--t-T.iSiFsiF5? '.- Jh,’ "r--"r'?s5iiiriztrc'czz--r.e,
te-, 11 Tgc-c-i-is-ss-ri-Arr-----, N
"tF-E-ie-ttSc-- 1 '2t"tt'TRt l g
EfiCilrze"sS-;' 1L: 'f8s=tER8==e=======tziiht- . - -
.. .. Ii a ,. l. 1.5:
.' :I " if GNDLINE
'u,'' T; 73; (mh)
TC5516AP/-2, TC5516APL/-2
TC5516AF/-2, TC5516AFL/-2
Note: Toshiba does not aswme any responsibiliw for use of any circuitry described; no circuit patent licenses are implied. and Toshiba reserves
the right, at any Uma without notice. to change said circuitry.
© Aug.. 198 Toshiba Corporation

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