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TC551402J-22-TC551402J-25
4,194,304 WORD BY 1-BIT/1,048,576 WORD BY 4 BIT CMOS STATIC RAM
TOSHIBA TC551402J-22,-25
TOSHIBA MOS DIGITAL INTEGRATED CIRCUIT SILICON GATE CMOS
1194,304-WORD BY 1-BlT/1,048,576-WORD BY 4-BIT CMOS STATIC RAM
DESCRIPTION
The TC551402J is a 4,194,304-bit high s eed static random access memory (SRAM), it is possible to change
the organization between 4,194,304 wor s by 1 bit and 1,048,576 words by 4 bits. Fabricated using CMOS
technology and_advanced circuit techniques to provide high speed, it operates from a single 5_V power sup ly.
Chip enable (CE) can be used to place the device in a low-power mode, and output enable (OE) provides ast
memory access. This device is well suited to cache memory applications where high-speed access and high-
speed storage are required. All inputs and outputs are isolated and directly TTL compatible. The TC551402J is
available in a plastic 32-pin SOJ package (400 mil width) for high density surface assembly.
FEATURES
0 Fast access time (the following are maximum values) 0 Single power supply voltage:
TC551402J-22 2 22 ns TC551402J-22 : 5Vi 5%
TC551402/r2.5 : 25 ns T,C5514.02J-25 :. 5Vi 10%
0 Low- ower dissipation 0 Fully static ogeratlon
(the 'ollpsying are maximum values) 0 All inputs an outputs are TTL compatible
Operating.' 180 mA (22 ns type) 0 Separate Inputs arid out uts (X 1 Mode),
Operating: 160 mA (25 ns type) Common data input an out ut (X 4 Mode)
Standby : 10 mA (all dev1ces) 0 gutlgut buffer control using E
0 ac a e:
SgOJ32-P-400-1.27A (Weight : 1.22 g typ)
PIN ASSIGNMENT BLOCK DIAGRAM
x1 A9 o-
x4 m n:
_------'"-?'---?,.;-:-,,'),'',),),"-'"-,'-,)'-'"--'-"-'''-', 8 = 35 g - MEhfflfJf" 4-o VDD
A0 AOL A19 A21 o- g‘m- iit 0
A1 A1E2 A18 A20 =8fiy, 03: 1024x1024x4 4 o GND
A2 A2E 3 A17 A19 o- re
A3 A3E4 A A16 A18 A0 o- L
A4 A4E5 it A15 A17 l
g EEG f E gs x1MODEch rs ttoo
CE I/01E7 > I/O4 OE K _----------
VOD VDDE 8 GND GND X4 MODE: I/OIC ts, COLUMN IIO Ps
GND GNDE9 t VDD VDD K CIRCUIT K
_D I/O_2E1o ._ I/O3 Q rs y//')' -
WE WEE11 v A14 A15 CY "s, COLUMN
A6 A5E12 A13 A14 DECODER
A7 A6E13 A12 A13 c
A8 A7E14 A11 A12
A9 A8E15 A10 All rs
A10 A9E16 31/34 31/34 l/O4c K CE
(SOO g A COLUMN
, ADDRESS BUFFER
PIN NAME t
- ,55 /lllllllll
A0 to A21 Address Inputs 95 A21 /\/ A10: x1 MODE
I/OI to I/O4 Data Inputs/Outputs uu A19 /\/ A10: x4 MODE
D Data Input " "
Q Data Output
E Chip Enable Input E o-CP CE
W Write Enable Input
E Output Enable Input W C 4y
VDD Power (+ 5V) - -sl"'h,
GND Ground l_2
31/34 Bit Function CD CE
961001EBA1
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operatin ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and con itions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
1997-06-16 1/7
TOSHIBA
TC551402J-22,-25
MAXIMUM RATINGS
SYMBOL ITEM RATING UNIT
VDD Power Supply Voltage - 0.5 to 7.0 V
" Input Terminal Voltage - 2.0* to 7.0 V
I/vo I/O Terminal Voltage - 0.5* to VDD + 0.5 V
VOUT Output Terminal Voltage - 0.5* to VDD + 0.5 V
PD Power Dissipation 1.0 W
Tsolder Soldering Temperature (10s) 260 T
Tstrg Storage Temperature - 65 to 150 "C
Topr Operating Temperature - 10 to 85 T
*: - 3V with a pulse width of 10 ns
DC RECOMMENDED OPERATING CONDITIONS (Ta = 0° to 70°C)
SYMBOL PARAMETER MIN TYP TYP UNIT
-22 4.75 5.0 5.25
VDD Power Supply Voltage V
-25 4.5 5.0 5.5
" Input High Voltage 2.2 - VDD + 0.5 V
" Input Low Voltage - 0.5* - 0.8 V
*: - 3V with a pulse width of 10 ns
DC CHARACTERISTICS (Ta = ty' to 70°C, -22 : VDD = 5V , 5%, -25 : VDD = 5V 1 10%)
SYMBOL PARAMETER TEST CONDITION MIN TYP TYP UNIT
IlL Input Leakage Current " = 0V to VDD - - t 10 #A
IOH Output High Current VOH = 2.4V - 4 - - mA
IOL Output Low Current VOL = 0.4V 8 - - mA
E = V W = V T = V V = V
ILO Output Leakage Current IH or IL or 0 IH, OUT 0 - - i 10 ,A
to VDD
. tcycle = Minimum Cycle, E = VlL, -22 - - 180
IDDO Operating Current mA
lout = 0mA, Other Inputs = " or " -25 - - 160
E = VIH
|DDS1 - - 30
Other Inputs = " or "
Standby Current - mA
CE = VDD - 0.2V
bose - - 10
Other Inputs = VDD - 0.2V or 0.2V
1997-06-16 2/7
TOSHIBA TC551402J-22,-25
CAPACITANCE (Ta = 25°C,f = 1.0 MHz)
SYMBOL PARAMETER TEST CONDITION MAX UNIT
Cm: Input Capacitance " = GND 8 pF
Cvo, CQUT DOUT Capacitance VOUT = GND 8 pF
Note: This parameter is periodically sampled and is not 100% tested.
TRUTH TAB LE
MODE B1/B4 E E W " POWER
Read H L L H Dout IDDO
x 1 Write H L x L Din IDDO
0 Output Disabled H L H H High - 2 IDDO
Standby H H x x High - Z IDDS
Read L L L H Dout IDDO
x4 Write L L x L Din IDDO
0 Output Disabled L L H H High - Z IDDO
Standby L H x x High - Z IDDS
M: "H'' or "L''
TC551402J is possible to change the organization of bit mode between 4M words by one bit and 1M
words by four bits with input level of pin condition B1/B4.
'UM X 1 Mode" is performed on when pin B1/B4 is held on 'Nm level". On the other hand "IM M 4
Mode" is requires B1/B4 be connected to "Vu, level".
Input level of B1/B4 condition must be set at the same time of power on. Any of change of input
level B1/B4, high or low, is prohibited after power on.
1997-06-16 3/7
TOSHIBA
TC551402J-22,-25
AC CHARACTERISTICS (Ta = 0° to 70°C (Note 4), -22 : VDD = 5V , 5%, -25 : VDD = 5V i 10%)
READ CYCLE
TC551402J-22 TC5514021-25
SYMBOL PARAMETER UNIT
MIN MAX MIN MAX
tRC Read Cycle Time 22 - 25 -
tACC Address Access Time - 22 - 25
tco Chip Enable Access Time - 22 - 25
tog Output Enable Access Time - 12 - 12
tcoE Output Enable Time from Chip Enable 5 - 5 -
tcoD Output Disable Time from Chip Enable - 10 - 10 ns
tOEE Output Enable Time from Output Enable 1 - 1 -
tooo Output Disable Time from Output Enable - 10 - 10
tOH Output Data Hold Time from Address Change 5 - 5 -
tpU Chip Selection to Power Up Time 0 - 0 -
tpD Chip Deselection to Power Down Time - 22 - 25
WRITE CYCLE
TC551402J-22 TC551402J-25
SYMBOL PARAMETER UNIT
MIN MAX MIN MAX
twc Write Cycle Time 22 - 25 -
twp Write Pulse Width 13 - 13 -
tAW Address Valid to End of Write 20 - 20 -
tcw Chip Enable to End of Write 20 - 20 -
tas Address Setup Time 0 - 0 -
tWR Write Recovery Time 0 - 0 -
toaw Output Enable Time from Write Enable 1 - 1 -
tODw Output Disable Time from Write Enable - 10 - 10
tos Data Setup Time 12 - 12 -
tDH Data Hold Time 0 - 0 -
AC TEST CONDITION FIG. 1
- 5 V 5 V
Input Pulse Levels 3.0V, 0.0V
Input Pulse Rise and Fall Time 3 ns 480n 4800
DOUT- l/Opin DOUT. |/Opin
Input Timing Measurement
Reference Levels
. . 30 pF 255 n CL = 5 pF 255 fl
Output Timing Measurement 1 5V
Reference Levels .
(For tcos, toss, tcoo, tooo,
Output Load Fig. 1 toew, tODW)
1997-06-16 4/7
TOSHIBA TC551402J-22,-25
TIMING DIAGRAMS
READ CYCLE (See Note 1) tRC
ADDRESS
tCOD (See Note 6)
tCOE tOEE tODO (See Note 6)
. (See Note 6) (See Note 6)
Q VALID DATA OUT
INDETERMINATE INDETERMINATE
WRITE CYCLE 1 (WE CONTROLLED) (See Note 5) t
ADDRESS
- t (See Note 6)
OE ODW tOEE
(See Note 6) (See Note 6)
(See Note 6)
Q See Note 2) See Note 3)
INDETERMINATE INDETERMINATE
D VALID DATA IN
WRITE CYCLE 2 (CE CONTROLLED) (See Note 5)
ADDRESS
- tODW (See Note 6)
OE (See Note 6)
(See Note 6)
INDETERMINATE DS
D VALID DATA IN
1997-06-16 5/7
TOSHIBA TC551402J-22,-25
Note: (1) Operating temperature (Ta) is guaranteed for transverse air flow exceeding 400
linear feet per minute.
(2) WE remains HIGH for Read Cycle.
(3)If tTE goes LOW coincident with or after IT/E goes LOW, the outputs will remain
at high impedance.
(4) If UE goes HIGH coincident with or before W goes HIGH, the outputs will remain
at high impedance.
(5) If UE- is HIGH during the write cycle, the outputs will remain at high impedance.
(6) The parameters specified below are measured using the load shown in Fig. 1.
(A) tCOE, tOEE, tOEW ... ... ... ... Output Enable Time
(B) tCOD,t0D0, tODW ... ... ... ... Output Disable Time
t 0.2 V
Q 0.2V VALID DATA OUT
INDETERMINATE INDETERMINATE+ 0.2 V
1997-06-16 6/7
TOSHIBA TC551402J-22,-25
PACKAGE DIMENSIONS
Plastic SO) (SOJ32-P-400-1.27A)
Units in mm
i-It-Ir-qc?.?.)..,-,.!-,,-?''",,''"'??"")
til a' t
l!? 8, a:
L..ll...JulclclL.lLdull..du..ll-lull-ll-lt-lt-l - -
1 16 ‘13
I 21.3mm ol'
20.96i0.12
/ l 5 3'
0.4333;
Em . 2mm;
|1.27l
Weight: 1.22g (typ)
1997-06-16 7/7
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