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TB1031NTOSN/a810avaiINTERFACE DRIVER IC FOR WASHING MACHINE
TB1031NTOS ?N/a20avaiINTERFACE DRIVER IC FOR WASHING MACHINE
TB1031NTOSHIBAN/a20avaiINTERFACE DRIVER IC FOR WASHING MACHINE


TB1031N ,INTERFACE DRIVER IC FOR WASHING MACHINE
TB1031N ,INTERFACE DRIVER IC FOR WASHING MACHINE
TB1031N ,INTERFACE DRIVER IC FOR WASHING MACHINE
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TB1031N
INTERFACE DRIVER IC FOR WASHING MACHINE
TOSHIBA TB1031N
TOSHIBA Bi-CMOS INTEGRATED CIRCUIT SILICON MONOLITHIC
TB1l031lhll
INTERFACE DRIVER IC FOR WASHING MACHINE
As an interface between the microcontroller and
peripheral devices, TB1031N is an ideal driver IC.
Because it contains various drivers on one chip, TB1031N
effectively reduces the number of parts.
The device features built-in registers that can simplify
software design when used in combination with an eight-
bit microcontroller.
(sin Wm ii iii:,));
EATURES
Built-in zero-cross detector circuit SDlP20-P-tu)0-1.78
Weight : 1.999 (Typ.)
High-current output ports (two 70mA, two 60mA, two
50mA ports ; four 30mA ports)
Direct drive for triac buzzer
Built-in buzzer drive circuit (2.7kHz)
Built-in pulse multiplication (x2) function
8bit serial interface
Built-in watchdog timer (30ms, 15ms settings)
Built-in mains voltage monitoring circuit
Built-in LC oscillator circuit
Built-in 8bit D/A converter for constant-current control
961001 EBA1
OTOSHIBA is continually working to improve the quality and the reliability of its products. Nevertheless, semiconductor
devices in general can malfunction or fail due to their inherent electrical sensitivity and vulnerability to physical stress.
It is the responsibility of the buyer, when utilizing TOSHIBA products, to observe standards of safety, and to avoid
situations in which a malfunction or failure of a TOSHIBA product could cause loss of human life, bodily injury or
damage to property. In developing your designs, please ensure that TOSHIBA products are used within specified
operating ranges as set forth in the most recent products specifications. Also, please keep in mind the precautions
and conditions set forth in the TOSHIBA Semiconductor Reliability Handbook.
OThe products described in this document are subject to foreign exchange and foreign trade control laws.
OThe information contained herein is presented only as a guide for the applications of our products. No responsibility
is assumed by TOSHIBA CORPORATION for any infringements of intellectual property or other rights of the third
parties which may result from its use. No license is granted by implication or otherwise under any intellectual
property or other rights of TOSHIBA CORPORATION or others.
OThe information contained herein is subject to change without notice.
1997-04-07 1/22
TOSHIBA
BLOCK DIAGRAM
TB1031N
Vcc AGND DGND WLO WL1 WL2 ROTOUT XIN XOUTI XOUTZ
SE ot' Output selector DAOUT C) OPTIN
cicuit
D Output
"v selector circuit
(xrxiy) CKIN D OPTRO
Pulse , Cl k
ROTIN C Digital filter - multiplication oc generator
CIFCUI
WLF RP fSCF
Yo- V2.1
SCK C Register selector Y7 _
circuit 8bit
C/D C g
WDT.WDF Control register
DI C WDCR
Watchdog timer WDOUT
_ RESET ; z _ I
Mains voltage _> . _ ero cross pu se
pow - ' ' ' ' generator
C monitoring cIrCUIt I TRCO- TTT? PHF ACP TB1P
J, TRC7 T0WT2M GW TB1F t,
Triac gate trigger PHOUT Phase control Buzzer drive C) BACOUT
circuit circuit circuit
TCO-TCT BZOUT C) ACCLK
High current output port
TC3 TC4
1997-04-07 2/22
TOSHIBA
TB1031N
PIN CONNECTION
ROTIN t
DGND t
BACOUT I
ACCLK t
KO‘DNO‘U’IDWN—I
il Vcc
l ROTOUT
l BRST
il XOUT2
[I XOUT1
[I WLO
l OPTIN
l OPTRO
l AGND
1997-04-07 3/22
TOSHIBA
TB1031N
PIN FUNCTIONS
PIN No. PIN NAME DESCRIPTION
1 ROTIN Pulse multiplication circuit input pin
2 T30 High-current output port 1 (open collector) 60mA output
3 T31 High-current output port 2 (open collector) 60mA output
4 TCO High-current output port 3 (open collector) 70mA output
5 TC1 High-current output port 4 (open collector) 70mA output
6 DGND Digital GND
7 TC2 High-current output port 5 (open collector) 50mA output
8 TC3 High-current output port 6 (open collector) 50mA output
9 TC4 High-current output port 7 (open collector) 30mA output
10 TC5 High-current output port 8 (open collector) 30mA output
11 TC6 High-current output port 9 (open collector) 30mA output
12 TC7 High-current output port 10 (open collector) 30mA output
13 BACOUT Mains power zero-cross detection output pin
14 ACCLK Mains power zero-cross detection input pin
15 POW Mains voltage monitoring input pin
16 AGND Analog GND
17 OPTRO Constant-current control circuit output pin
18 OPTIN Constant-current control circuit input pin
19 WLO LC oscillator circuit input pin
20 WL1 LC oscillator circuit output pin 1
21 WL2 LC oscillator circuit output pin 2
22 XIN Oscillator input pin
23 XOUT1 Oscillator output pin 1
24 XOUT2 Oscillator output pin 2
25 DI Serial data input pin
26 SCK Serial clock input pin
27 C/D Command/data switching signal input pin
28 BRST Reset signal output pin (low reset)
29 ROTOUT Pulse multiplication circuit output pin
30 VCC System power supply
1997-04-07 4/22
TOSHIBA
MAXIMUM RATINGS (Ta = 25 i1.5°C)
CHARACTERISTIC SYMBOL RATING UNIT
Supply Voltage VCC -0.3--7.0 V
Input Voltage VIN -O.3~Vcc+0.3 V
POW Pin Input Voltage VINPOW -0.3--16 V
TBO And TB1 Pin Input Voltage VINTB -0.3--12 V
Power Dissipation PD (Note 1) 1.5 W
Operating Temperature Topr -20-75 °C
Storage Temperature Tstg -55--125 °C
Electrostatic Destruction ESD (Note 2) i250 V
Latch Up Current IL -+10 mA
(Note 1)
increase.
(Note 2)
C=200pF and R=00, one discharge for each polarity.
TB1031N
The power dissipation decreases about 12mW for every degree of temperature
ELECTRICAL CHARACTERISTICS (Unless otherwise specified, VCC = 5.0V, Ta = 25 i1.5°C)
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Operating Supply
Voltage VCC - - 4.0 5.0 6.0 V
Operating Current 8.0MH2 oscillation with no
Dissipation ICC - load - - 20 mA
Operating Frequency FOPRAN - - 4 - 8 MHz
Pin 1 (ROTIN)
l"") Pin Voltage VOPRTIN - When idle 4.95 5.0 5.05 v
(Design Target)
Low-level Input Current llLRRTIN - When idle and Vin=0V -77 -100 -143 PA
High-level Input 0.8
Voltage VIHRTIN - - VCC - VCC V
Low-level Input Voltage VILRTIN - - 0 - 0.2 V
Pin 2 (TBO), Pin3 (TB1)
Off-Ieak Current IOFFTB01 - When idle and Vin=5V -1 - 1 pA
Low-level Output
Current |OLTBO1 - VOL - 1.0V 60 - - mA
1997-04-07 5/22
TOSHIBA TB1031N
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Pin4 (TCO), Pin 5 (TC1)
Off-Ieak Current |OFFTC01 - When idle and Vin=5V -1 - 1 pA
Low-level Output
Current |OLTC01 - VOL= 1.0V 70 - - mA
Pin 7 (TC2), Pin 8 (TC3)
Off-Ieak Current IOFFTC23 - When idle and Vin=5V -1 - 1 PA
Low-level Output
Current IOLTC23 - VOL_1.OV 50 - - mA
Pin 9 (TC4), Pin 10 (TCS), Pin 11 (TC6), Pin 12 (TC7)
Off-Ieak Current |OFFTC47 - When idle and Vin=5V -1 - 1 pA
Low-level Output
Current IOLTC47 - VoL=1.0V 30 - - mA
Pin 13 (BACOUT)
High-level Output -
Voltage VOHACOUT - 'OH - 1mA 4.5 - 5.0 V
Low-level Output
Voltage VOLACOUT - IOL-- 1mA o - 0.5 v
Pin 14 (ACCLK)
When input goes from high to
Threshold Voltage VTHACCLK - low, voltage to change 0.25 0.35 0.45 V
BACOUT from high to low
When input goes from low to
high, difference between
Hysteresis Width VHYSACCK - VTHACCLK and voltage needed 50 100 150 mV
to change BACOUT pin from
low to high
Pin 15 (POW)
. When input changes from high
nglthaleevel Threshold VTHPOW - to low, voltage to change 5.2 5.4 5.6 V
g BRST pin from high to low
When input goes from low to
high, difference between
Hysteresis Width VHYSPOW - VTHPOW and voltage needed 1.35 1.45 1.55 V
to change BRST pin from low
to high
Voltage that can be applied to
Input Voltage Range VINPOW - POW pin 0 - 16 V
Recommended oscillator :
Murata 8MHz Ceralock ceramic oscillator (CST8.0MTW)
1997-04-07 6/22
TOSHIBA TB1031N
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Pin 17 (OPTRO)
VCC= 5V, When 300 external
resistor connected, 3.0V
Output Current 1 lOPI - applied to OPTIN pin, and 67 70 73 mA
DAC = FF
VCC= 5V, When 3on external
Output Current 2 resistor connected, 3.0V
(Design Target) IOPZ - applied to OPTIN pin, and 0 0.55 1.24 mA
DAC=01
VCC= 5V, When 300 external
resistor connected, 3.0V
Output Current 3 IOP? - applied to OPTIN pin, and 33.1 35.3 37.6 mA
DAC=80
VCC= 5V, When 3on external
resistor connected, 3.0V
Output Current 4 |OP4 - applied to OPTIN pin, and 0.12 0.82 1.53 mA
DAC=02
VCC= 5V, When 300 external
resistor connected, 3.0V
Output Current 5 |OP5 - applied to OPTIN pin, and 0.64 1.37 2.10 mA
DAC=04
Vcc= 5V, When 300 external
resistor connected, 3.0V
Output Current 6 |OP6 - applied to OPTIN pin, and 1.69 2.46 3.24 mA
DAC=08
VCC-- 5V, When 300 external
resistor connected, 3.0V
Output Current 7 IOP? - applied to OPTIN pin, and 3.78 4.65 5.53 mA
DAC = 10
VCC-- 5V, When 300 external
resistor connected, 3.0V
Output Current 8 IOP8 - applied to OPTIN pin, and 7.97 9.02 10.1 mA
DAC=20
VCC-- 5V, When 300 external
resistor connected, 3.0V
Output Current 9 lOP9 - applied to OPTIN pin, and 16.3 17.8 19.3 mA
DAC = 40
1997-04-07 7/22
TOSHIBA TB1031N
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
When Vcc=4.5V, 300 external
o t t c rrent 10 ©P10 resistor connected, 2.5V 60 63 66 mA
u pu u - applied to OPTIN pin, and
DAC=FF
VCC=5.5V, When 300 external
resistor connected, 3.5V
Output Current 11 |OP11 - applied to OPTIN pin, and 74 77 80 mA
DAC=FF
Pin 18 (OPTIN)
When DAC data are 00 and
Off-leak Current IOFFOPIN - Vin =4.5--5.5V -1 - 1 prA
8bit D/A Converter (DAC) Characteristics
DAC Reference Voltage
1 (Design Target) VREF1 - When Vcc=5.0V 2.03 2.10 2.18 V
DAC Reference Voltage
2 (Design Target) VREF2 - When Vcc=4.5V 1.83 1.89 1.96 V
Vcc = 5.0V
DAC Output Voltage 1 VOPTRO1 - When DAC lata FF and 300 2.01 2.10 2.20 v
external resistor connected to
OPTRO pin
When vcc=4.5v, DAC data FF,
DAC Output Voltage 2 VOPTR02 - and 300 external resistor 1.81 1.89 1.98 V
connected to OPTRO pin
Monotony A|DAC1 - IDAC(n +1)-IDAC(n) 0.01 0.27 0.55 mA
n = 0--255
. . (IOP1 - |OP9)/191
DAC Linearity 1 DALINTY1 - (lOP1-lOP3)/127 0.98 1.00 1.02 -
. . (lOP1-lOP8)/223
DAC Linearity 2 DALINTY2 - (iop1-_op3)/127 -lOP3)/127 0.98 1.00 1.02 -
Pin 19 (WLO)
High-level Input IIHRWLO V; =51/ WL1 in o en 4.3 8.6 17.1 A
Current In - ' p p . . . ’u
Low-level Input Current ||LRWLO - Vin=0V, WL1 pin open -4.3 -8.6 -17.1 pA
1997-04-07 8/22
TOSHIBA TB1031N
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Pin 20 (WL1)
High-level Output |OHWL1 - lin =0V, 0V applied to WLO -0.9 - - mA
Current pm
Low-level Output IOLWL1 - lin =5V, 5V applied to WLO 0.9 - - mA
Current pm
Pin 21 (WL2)
High-level Output - - -
Voltage VOHWL2 IOH - 1mA 4.5 VCC V
Low-level Output -
Voltage VOLWL2 - IOL =1mA 0 - 0.5 V
Pin 22 (XIN)
High-level Input . - -
Voltage IIHXIN Vin - 5V 1.5 7.0 pzA
Low-level Input Voltage llLXIN - Vin =0V - 1.5 - -7.0 pA
Pin 23 (XOUT1)
High-level Output
VOHXOUT1 - I = -300 A 4.5 - V V
Voltage OH I“ CC
Low-level Output -
Voltage VOLXOUT1 - lOL=300PA 0 - 0.5 v
Pin 24 (XOUT2)
High-level Output - -
Voltage 1/OHXOUT2 'OH - 1mA 4.5 VCC V
Low-Ievel Output - -
Voltage VOLXOUT2 lot.. =1mA 0 0.5 V
Oscillator Characteristics
Oscillation Start VSTA - Wh.en .usmg 4~8MH2 - - 4.0 V
Voltage oscillation
Oscillation Holding VHOLD - why .usmg 4--8MHz - - 4.0 V
Voltage oscillation
Oscillation Start Time TSTA - when .usmg 4~8MHZ - - 1.0 ms
oscillation
Pin 25 (DI)
(Pe? Pin Voltage VOPDI - When idle 4.995 5.000 5.005 v
(Design Target)
Low-level Input Current IlLRDI - When idle and Vin=0V -th77 -1_0 - 1.43 mA
High-level Input 0.8
VIHDI - - - V V
Voltage VCC CC
Low-level Input Volta e VILDI - - 0 - V
1997-04-07 9/22
TOSHIBA TB1031N
CHARACTERISTIC SYMBOL CIR- TEST CONDITION MIN. TYP. MAX. UNIT
Pin 26 (SCK)
PPT Pin Voltage VOPSCK - When idle 4.995 5.000 5.005 v
(Design Target)
Low-level Input Current ||LRSCK - When idle and Vin=OV -0.77 -1.0 -1.43 mA
High-level Input 0.8
Voltage VIHSCK - - VCC - VCC V
Low-level Input Voltage VILSCK - - 0 - 0.2 v
Pin 27 (C / D)
Sli"? Pin Voltage VOPCD - When idle 4.995 5.000 5.005 v
(Design Target)
Low-level Input Current IILRCD - When idle and Vin=0V -0.77 -1.0 -1.43 mA
High-level Input 0.8
Voltage VIHCD - - VCC - VCC V
Low-level Input Volta e VILCD - - O - V
Pin 28 (BRST)
High-level Output - - -
voltage VOHBRST - lOH= 1mA 4.5 Vcc v
Low-level Output - -
Voltage VOLBRST - IOL - 1mA O 0.5 V
Pin 29 (ROTOUT)
High-level Output - - - -
Voltage VOHRTOUT IOH= 1mA 4.5 Vcc v
Low-level Output -
Voltage VOLRTOUT - IQL_1mA 0 0.5 v
TOSHIBA TB1031N
DESCRIPTION OF OPERATION
(1) Control registers
To control the TB1031N operation, set the internal registers through serial communications with
the microcontroller. The control registers are 8bit registers organized as in the following table.
1.1 Control registers
REGISTER NAME SYMBOL
Command Register 0 Co
Command Register 1 C1
Triac Register TRCO-7
Phase Data Register 1 PD00--07
Phase Data Register 2 PD10--17
D/A Data Register YO--?
Command register (C0, C1) functions
REGISTER
NAME SYMBOL FUNCTION
To IC testing
T1 IC testing
WDF Watchdog timer operation enable/disable
WDT Watchdog timer time selection
Co WLF WL2 output selection
RP Pulse multiplication circuit (ROTOUT) output selection
TB1P TB1 port output mode selection
SCF System clock selection
T2 TCO and TC1 simultaneous ON enable/disable
T3 TC2 and TC3 simultaneous ON enable/disable
PHF Phase control enable/disable
C1 GW TCO-TC? triac gate pulse width selection
TOM TCO and TC1 pulse mode selection
T2M TC2 and TC3 pulse mode selection
TB1F TB1 ON/OFF control
TBOF TBO ON/OFF control
1997-04-07 11/22
TOSHIBA TB1031N
Control register 0 (C0)
MSB LSB
BIT STATE To l T1 WDF WDT WLF RP TB1P SCF
0 Normal mode Disable 15ms WL2 x1 2.7kHz 4MHz
1 Test mode Enable 30ms ROTOUT x2 DC 8MHz
After reset 0 l o o o o o o 0
(Note) Set bits T0 and T1 to "O".
Control register 1 (C1)
BIT STATE MSB LSB
T2 T3 PHF GW TOM T2M TB1F TBOF
0 Disable Disable Disable 1ms DC DC OFF OFF
1 Enable Enable Enable 2ms 4kHz 4kHz ON ON
After reset 0 0 0 0 0 0 0 0
1.2 Triac register (TRCO--7)
The triac register is organized as in the following table. This register is used to select a port
(pins TCO~TC7) to drive.
Triac register (TRC)
BIT NAME MSB LSB
TRC7 TRC6 TRC5 TRC4 TRC3 TRC2 TRC1 TRCO
cor""',,'',.:"'" TC7 TC6 TC5 TC4 TC3 TC2 TC1 TCO
0 OFF OFF OFF OFF OFF OFF OFF OFF
1 ON ON ON ON ON ON ON ON
After reset 0 0 0 0 0 0 0 0
1.3 Phase data registers 1 and 2 (PD00--PD07, PD10--PD17)
The phase data registers are organized as in the following table. When performing phase
control, the delay time data from the zero-cross point can be set.
Phase data register 1 (PDQ)
BIT NAME MSB LSB
PDO7 PDO6 PDOS PD04 PDO3 PD02 PD01 PDOO
After reset 0 0 0 0 0 0 0 0
Phase data register 1 (PD1)
BIT NAME MSB LSB
PD17 PD16 PD15 PD14 PD13 PD12 PD11 PD10
After reset 0 0 0 0 0 0 0 0
1997-04-07 12/22
TOSHIBA TB1031N
1.4 D/A data register (YO--Y7)
The D/A data register is organized as in the following table. The register can be used to set
the built-in 8bit D/A converter data.
D/A data register (Y07)
MSB LSB
BIT NAME Y7 Y6 Y5 Y4 Y3 Y2 Y1 Y0
After reset 0 o O o O o O o
(2) Communication with microcontroller
Communication with the microcontroller is based on serial communications controlled by the data
received from the microcontroller. Transfer data consist of 2-byte commands (C0, C1) and 4-byte
data (TRC, PDO, PDI, Yo7). Command transfer is enabled on the rising edge of the C/D pin. Data
transfer is enabled on the falling edge of the C/D pin.
Transfer timing chart
Command ldata
switching JCommand enabled lData enabled
Serialdata
DI TRC X Poo X Pm X Yov F
LSB-YMSB LSB-YMSB LSB-yMSB LSB-YMSB LSB-rMSB LSB-YMSB
(3) Phase data resolution
The delay time from the zero-cross point is set using the internal 32kHz-clock as a reference. The
maximum delay is 8ms (at FFH) ; the minimum delay is 31.25ps (at 00H).
(Example) (Example)
Motor driving time : Short Motor driving time : Long
Slow rotation . .' Fast rotation
PD(max) i.' PD (min) i," .
Zero-cross ' .
pulse LI LI
1997-04-07 13/22
TOSHIBA TB1031N
(4) Data register combination during phase control
Four pins are provided as phase-controllable port pins .' TCO, TC1, TC2, TC3
The C1 register contains two bits (T2, T3) to select a combinations of the four pins to be used
simultaneously. During phase control, these bits can be set to change the combination of the
phase data output to the port pins.
Phase data combinations using simultaneous ON control bits T2 and T3.
'lMlgil/rl1EfLhfliroN HIGH-CURRENT OUTPUT PORT PIN
T2 T3 TCO l TC1 TC2 l TC3
o o PDO PD1
1 o PDO l PDI - -
0 1 PDO PDI -
1 1 PDO l PDI - -
When performing phase control, set the PHF bit in the C1 register to "I".
(5) TCO~TC3 pins zero-cross synchronization/pulse output
To avoid radio-frequency impulse noise and triac degradation, the TB1031N is designed so that
the triac trigger can be turned ON at a timing synchronized to the zero-cross point. Also, to
reduce power dissipation, the pulse signals can be used to trigger the triacs. The internal 4kHz-
clock can also be used for pulse output.
Bits TOM and T2M of command register 1 (C1) can select DC and pulse output.
BIT NAME TOM T2M
Corresponding pin TCO.TC1 TC2.TC3
0 DC output DC output
1 Pulse output (4kHz) Pulse output (4kHz)
Timing chart
ACIN of 1 .' "ss,.....,...,,,.,,.,,..-----"''"" ,
Zero-cross pulse LI LI I
Triac data J
TRC0.TRCrTRC2qRC3 l
Zero-cross synchronization
DC output _I l,
Pulse output (4kHz)
1997-04-07 14/22
TOSHIBA
Zero-cross detector circuit
TB1031N
The voltage divided from full-wave rectified AC power is input to ACCLK. The circuit detects the
rising edge of the ACIN and can generate a 1ms-zero-cross pulse at BACOUT.
Block diagram
Timing chart
BACOUT
Threshold voltage
VTHACCLK : 0.35V
re m '-
m '- +
t,/a:1z, _iCy:s,a-N--c:so-
m '- - ACIN
Zero-cross pulse
CLK-- generator
Hysteresis voltage
VHYSACCK : 0.1V V
J Pulse width : 1ms
Triac gate signal width selection (GW)
BACOUT
Microcontroller
During phase control, the pulse width of the gate signal for the triac connected to pins TCO~TC3
can be selected from two pulse widths in accordance with the triac sensitivity. Register C1 is used
for the gate signal width selection.
BIT STATE GW
1997-04-07 15/22
TOSHIBA TB1031N
TBO and TB1 pin control
The bits (TB1F and TBOF) to turn the output of pins TBO and TB1 ON and OFF are assigned to
register C1. Pin TB1 also has a bit (TB1P) to select DC output or the pulse output (2.7kHz) for
driving a buzzer, for example.
BIT STATE TB1F TBOF TB1P
0 OFF OFF 2.7kHz output
1 ON ON DC output
System clock selection (SCF)
TB1031N includes an internal clock generator to generate several basic clocks and supply the
clocks to the logic circuits. When the source clock is 8MHz, be sure to set the SCF bit of the Co
register to "I". When the source clock is 4MHz, set SCF to "0".
BIT STATE SCF
0 Using 4MHz oscillator
1 Using 8MHz oscillator
Watchdog timer
The watchdog timer is cleared each time one byte of serial data is sent from the microcontroller.
If serial data are not sent for 15ms or 30ms, a Ims-width reset signal can be output to the BRST
pin to reset the microcontroller. The watchdog timer control bits (WDF and WDT) are assigned to
register Co.
BIT STATE WDF WDT
0 Disabled Detection time 15ms
1 Enabled Detection time 30ms
Timing chart
Serial clock
15ms or 30ms
Reset output , .
BRST E U .
_-e- 1 ms
1997-04-07 16/22
TOSHIBA TB1031N
Pulse multiplication circuit
This circuit can detect the rising or falling edge of the pulse input from the ROTIN pin, and
output a 1x or 2x pulse to the ROTOUT pin. The ROTOUT output selection bit (RP) is assigned
to register Co. When 2x, the pulse width is fixed at 1ms.
BIT STATE RP
0 ROTOUT : Outputs 1xROTIN pulse
1 ROTOUT : Outputs ZXROTIN pulse
Timing chart
ROTIN I l_l I,
ROTOUT I I I l
R0TOUT |_I |_I l_| |_I
(2x) : :
p-ot- Fixed at 1ms
LC oscillator circuit
An LC oscillator circuit can be configured simply by attaching an external variable coil (L) and a
fixed capacitor (C). The square wave signal (WLOUT) formed from the WL1 output is output to
pin WL2. Bit WLF, located in the Co register, can be used to select either WLOUT output or
ROTOUT output.
BIT STATE WLF
0 WL2 : WLOUT (WL1) output
1 WL2 : ROTOUT output
Example circuit
- ROTOUT
Microcontroller circuit
Example design : L=0.38mH C=0.022/1F
1997-04-07 17/22
TOSHIBA TB1031N
(13) 8Bit D/A converter for constant-current control
To make the load current constant, attach a load such as a sensor to the OPTIN pin, set the data
in the D/A data register, and connect a resistor to the OPTRO pin.
Block Diagram
t VREF CC
OPTIN: Q1
21k0 29k0
(Note) Because the AMP1 output is held low when the D/A data are 00H, QI is OFF.
Therefore, the effective data length is seven bits (Y1--Y7).
The 8bit D/A resolution is : VREF (2.1V)/256=about 8.2mV (@Vcc=5V)
(14) Mains voltage monitoring circuit
Implement full-wave rectification on the secondary side output of the transformer and step down
the smoothed voltage. By monitoring the stepped-down voltage at the POW pin (pin 15), a reset
can be performed on the internal registers and logic circuits.
Also, by connecting the BRST pin to the reset pin of the microcontroller, the entire application
system can be reset.
As the following timing chart shows, the reset voltage has hysteresis, which guarantees operation
during momentary outages, for example.
Block diagram
Mains.yoltage BCLR . . _
monitoring Logic circuit reset
circuit
Microcontroller
reset Pin Watchdog timer reset
1997-04-07 18/22
TOSHIBA TB1031N
Timing chart
POW pin voltage
Reset release voltage
VTH POW VHYSPOW
5.4V (Typ.) 1.45V (Typ.)
Hysteresis voltage
Microcontroller minimum
operating voltage
_ . : Reset voltage ..... : ..................
_......-.-.... i' VTH POW2
The above chart shows the recommended design for the relationship between the mains power
monitoring voltage (VPOW) and the system power supply (Vcc).
(15) High-current output port
The high-current output port (pinsTBO, TB1, TCO-TCP) are NPN open collector circuits and can
directly drive devices such as a triac or buzzer.
Select the most suitable triac or buzzer in accordance with the use conditions.
Block diagram
Control signal
Resistors R1 and R2 are configured for each port as in the following table.
PIN OUTPUT CU?REN)T R1 R2 PIN OUTPUT CURRENT R1 R2
CAPACITY min CAPACITY (min)
v0L=1.ov (Tyio.) (Typ-) 1/oL=1.0V (Typ.) (Tm)
TBO TC4
TBI 60mA 3400 TC5
30mA 6500 70k0
TCO 70 A 2900 70k0 TC6
TC1 m TC7
TC3 50mA 4000
(Note) Depending on the number of high-current output ports ON simultaneously,
the power dissipation shown in the maximum ratings may be inadvertently
exceeded. Take care not to exceed the rating.
1997-04-07 19/22
TOSHIBA TB1031N
(16) Oscillator circuit
The oscillator circuit is configured as in the following diagram. Connecting 4MHz--8MHz
oscillators creates a system clock. To supply a clock to the microcontroller, connect the XOUT2 pin
to the microcontroller':; XOUT pin.
Block diagram
generator i' Basic clock
OSC XOUT1
. XOUT2
Microcontroller
XOUT pin
Recommended oscillators : 8MHz : Murata 8MHz Ceralock ceramic oscillator (CST8, OMTW)
4MHz : Murata 4MHz Ceralock ceramic oscillator (CST4, OMGW)
1997-04-07 20/22
TOSHIBA
TB1031N
APPLICATION CIRCUIT EXAMPLE
Power switch
switch
Drainage
supply
Softener supply
(*) Valve
detector circuit
Input settin
Microcontroller
ROTI N V
CC Start / Stop
Drive mode
Wash time
Rinse cycles
Spin time
Flow setting
Time/Timer
TBO ROTOUT
TBI BRST IRESET
TCO CID
TC1 SCK
State detection
TC3 XOUT1
Cover switch
unbalance detection
Water level detection
Dirt detection
Wash volume detection
Motor rotation detection
TC4 XIN
TC5 WL2
TC7 WLO
Sensor
BACO UT
Indicator
ACCLK OPTRO
Driver
POW AG N D
1997-04-07 21/22
TOSHIBA TB1031N
OUTLINE DRAWING
SDIP30-P-400-1.78 Unit : mm
FTr'7r-nr'-lr'"1r-l7nr-"lr-1l'C1f-lf-1r-1r-1I1
a.a:o.2
cll-lcjcft-fl-lcJl-lcjt-JcJclL-JclL-l
27.9MAX
27.4i:0.2
I r [ii ?l
__2_ w!
1.254TYP I l,1.0do.1 I , 0.46i0.1 I'm
1 .778
Weight : 1.999 (Typ.)
1997-04-07 22/22

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