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STW50NB20STN/a26avaiN


STW50NB20 ,NSTW50NB20®N - CHANNEL 200V - 0.047Ω - 50A - TO-247PowerMESH™ MOSFETTYPE V R IDSS DS(on) DSTW50NB2 ..
STW52NK25Z ,N-CHANNEL 250V-0.033Ohm-52A TO-247 Zener-Protected SuperMESH™MOSFETFeatures Figure 1: PackageTYPE V R I PwDSS DS(on) DSTW52NK25Z 250 V < 0.045 Ω 52 A 300 W

STW50NB20
N
STW50NB20
N - CHANNEL 200V - 0.047Ω - 50A - TO-247
PowerMESH MOSFET TYPICAL RDS(on) = 0.047 Ω EXTREMELY HIGH dv/dt CAPABILITY ± 30V GATE TO SOURCE VOLTAGE RATING 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED
DESCRIPTION

Using the latest high voltage technology,
STMicroelectronics has designed an advanced
family of power Mosfets with outstanding
performances. The new patent pending strip
layout coupled with the Company’s proprietary
edge termination structure, gives the lowest
RDS(on) per area, exceptional avalanche and
dv/dt capabilities and unrivalled gate charge and
switching characteristics.
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING SWITCH MODE POWER SUPPLIES (SMPS) DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
October 1999
ABSOLUTE MAXIMUM RATINGS

(•) Pulse width limited by safe operating area (1) ISD ≤ 50 A, di/dt ≤ 200 A/μs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
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THERMAL DATA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (Tcase = 25
o C unless otherwise specified)
OFF
ON (∗)
DYNAMIC
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ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
(∗) Pulsed: Pulse duration = 300 μs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
Safe Operating Area Thermal Impedance
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Output Characteristics
Transconductance
Gate Charge vs Gate-source Voltage
Transfer Characteristics
Static Drain-source On Resistance
Capacitance Variations
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Normalized Gate Threshold Voltage vs
Temperature
Source-drain Diode Forward Characteristics
Normalized On Resistance vs Temperature
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Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For

Resistive Load
Fig. 2: Unclamped Inductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching

And Diode Recovery Times
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