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STSR3CD-STSR3CD-TR-STSR3CD-TR. Fast Delivery,Good Price
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STSR3CD-TR. |STSR3CDTRST ?N/a600avaiSYNCHRONOUS RECTIFIERS SMART DRIVER FOR FLYBACK
STSR3CDSTN/a5200avaiSYNCHRONOUS RECTIFIERS SMART DRIVER FOR FLYBACK
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STSR3CD-STSR3CD-TR-STSR3CD-TR.
SYNCHRONOUS RECTIFIERS SMART DRIVER FOR FLYBACK
1/11October 2002 SUPPLY VOLTAGE RANGE: 4V TO 5.5V TYPICAL PEAK OUTPUT CURRENT:
(SOURCE 2A, SINK 3.5A) OPERATING FREQUENCY:30 TO 750 KHz SMART TURN-OFF ANTICIPATION TIMING AUTOMATIC TURN OFF FOR DUTY CYCLE
LESS THAN 14% POSSIBILITY TO OPERATEIN
DISCONTINUOUS MODE
DESCRIPTION

STSR3 Smart DriverIC providesa high current
outputs to properly drive secondary Power
Mosfets using as Synchronous Rectifierin low
output voltage, high efficency Flyback Converters.
Froma synchronouzing clock input, withdrawnon
the secondary sideof the isolation transformer,
the IC generatesa driving signal with set dead
times with respectto the primary side PWM signal.
The IC operation prevents secondary side
shoot-through conditionsat turn-onof the primary
switch providing anticipationin turn-off the output.
This smart functionis implemented bya fast
cycle-after-cycle logic control mechanism, baseda high frequency oscillator synchronizedby the
clock signal. This anticipationis externally set
through external component.A special Inhibit
function allowsto shut-off the drive output. This
feature makes discontinuous conduction mode
possible and avoids reverse conductionof the
synchronous rectifies.
STSR3

SYNCHRONOUS RECTIFIERS
SMART DRIVER FOR FLYBACK
SCHEMATIC DIAGRAM
STSR3
2/11
ABSOLUTE MAXIMUM RATINGS

AbsoluteMaximum Ratingsare those values beyond which damagetothe device may occur. Functional operation under these conditionis
not implied.
(*)A higher positive voltage level canbe appliedtothepin witha resistor which limitsthe current flowingintothepinto 10mA maximum
THERMAL DATA

(*) This valueis referredtoone layerpcb board with minimum copper connectionsforthe leads.a minimum valueof 120 °C/Wcanbe
obtained improving thermal conductivityofthe board
ORDERING CODES
CONNECTION DIAGRAM
(top view)
STSR3
3/11
PIN DESCRIPTION
STSR3
4/11
ELECTRICAL CHARACTERISTICS
(VCC =5V, CK= 250kHz, duty-cycle=50%,V INHIBIT =-200mV,TJ =-40 125°C, unless otherwise specified.)
Note1:tRis measured between 10% and 90%ofthe final voltage;tFis measurerd between 90% and 10%onthe initiualvoltage
Note2: Parameter guaranteedby design
STSR3
5/11
TIMING DIAGRAM
APPLICATION INFORMATION: STSR2IN FORWARD CONVERTER SECONDARY SIDE

NOTES Ceramic CapacitorsC1andC2 mustbe placed very closetotheIC;R1 andR2set theanticipationtimeby partitioning theVcc voltage;R3andR4isa resistor divider meantto providethe correctCk voltage range;R5 limitsthe current flowing through diodeD2 when Freewheeling drain voltageis high;D1 couldbe necessaryto protect INHIBITpin from negative voltages.D2 couldbe necessaryto protect INHIBITpin from voltages higher thanVccD3 couldbe necessaryto protectCKpin from voltages higher than Vcc. SGLGND layout trace mustnot include OUTGATE current paths.A capacitorin parallel withR4 couldbe necessaryto eliminate turnoff voltage spike.
STSR3
6/11
EXAMPLE OF COMPONENTS SELECTION FORA FORWARD CONVERTER

Forward Specification:IN =36-72V OUT =3.3V
n=Np/Ns=4.5 and R4 are calculated assuringa minimum voltageof 2.8Vat Ck pin.At 36V input, the voltageon the
secondary windingis 36/4.5=8V. Choosing R3=1.5KΩ,R4 resultsto be:4 =1kΩis chosen.At 72V input the currentatCk pinis calculated as:
This valueis below the maximum allowable current flowing into the Ck pin (10mA).If the 10mA valueis
exceededan external diode connectedtoVCC mustbe added (D3).1 andR2 values set the anticipation time for OUT GATE .ForR1=∞ andR2=0,t ANT =75ns; for1=R2 =10kΩ,t ANT =150ns;forR1=0 andR2 =∞,t ANT =225ns.
The RC group composed byR5 and the parasitic capacitanceof Inhibit pin (typically 5pF) delays the
signal on Inhibit comparator. This delay mustbe lower than 200ns. This condition imposesa maximum
value forR5of about 20kΩ. generala suggested value forR5is 10kΩ.At 72V input, the secondary voltageis 16V,so the maximum
current flowing into Inhibit pinis 16V/10kΩ=1.6mA whichis below the maximum allowable currentfor the
pin (10mA).If the 10mA valueis exceededan external diode (D2) connectedtoVCC mustbe added.
The maximum negative voltageof –0.6V mustbe guaranteed for the Inhibit pin.If this negative voltageis
exceeded the current mustbe limitedto 50mA.If necessary,a diode (D1) connectedto SGLGND canbe
addedto satisfy this specification. VCKICK 2.8() R3×+INICK2.8()– R3 VCK–×--------------- --------------- --------------- -------------------≥ 1kΩ 2.8V 220μA1.5kΩ×+ 220μA– 1.5kΩ 2.8V–×--------------- --------------- --------------- ---------------- -------------× 965Ω==CKIN max() VCC– 0.3–3
----------- --------------- --------------- ------------ 16 5– 0.3–
1.5kΩ- --------------- -------------- 7.13mA== =
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