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STS9NF30L
N-CHANNEL 30V
1/8December 2002
STS9NF30LN-CHANNEL 30V - 0.015 Ω - 9A SO-8
LOW GATE CHARGE STripFET™ II POWER MOSFET TYPICAL RDS(on) = 0.020 Ω @ 5 V TYPICAL Qg = 9.5 nC @ 4.5 V OPTIMAL RDS(on) x Qg TRADE-OFF CONDUCTION LOSSES REDUCED SWITCHING LOSSES REDUCED
DESCRIPTIONThis application specific Power MOSFET is the second
generation of STMicroelectronis unique "Single Feature
Size™" strip-based process. The resulting transistor
shows the best trade-off between on-resistance and gate
charge. When used as high and low side in buck
regulators, it gives the best performance in terms of both
conduction and switching losses. This is extremely
important for motherboards where fast switching and
high efficiency are of paramount importance.
APPLICATIONS SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS FOR MOBILE PCS
INTERNAL SCHEMATIC DIAGRAM
ABSOLUTE MAXIMUM RATINGS(•) Pulse width limited by safe operating area.
STS9NF30L
THERMAL DATA(*) When mounted on FR-4 board with 0.5 in2 pad of Cu.
ELECTRICAL CHARACTERISTICS (Tcase = 25 °C unless otherwise specified)OFF
ON (*)
DYNAMIC
3/8
STS9NF30LSafe Operating Area
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
(*)Pulsed: Pulse duration = 300 μs, duty cycle 1.5 %.
(•)Pulse width limited by safe operating area.
ELECTRICAL CHARACTERISTICS (continued)
STS9NF30LOutput Characteristics
5/8
STS9NF30LNormalized Gate Threshold Voltage vs Temperature Thermal Impedance .
STS9NF30L
Fig. 2: Gate Charge test Circuit
Fig. 1: Switching Times Test Circuits For Resistive Load
