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STPTIC-47G1H5 |STPTIC47G1H5STMicroelectronicsN/a193560avaiBST tunable integrated RF capacitor


STPTIC-47G1H5 ,BST tunable integrated RF capacitorapplications. These • Capacitor bias is DC blockedtunable capacitances are controlled through a • F ..
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STPTIC-47G1H5
BST tunable integrated RF capacitor
January 2014 DocID023772 Rev 3 1/13
STPTIC

Parascan™ tunable integrated capacitor
Datasheet - production data
Features
High power capability (+36 dBm) High tuning range (3.5/1) High quality factor (Q) High linearity device Low leakage current Capacitor bias is DC blocked Frequency of operation from DC to 3 GHz 8 values available: 1.2 pF, 2.7 pF, 3.3 pF,
3.9 pF, 4.7 pF, 5.6 pF, 6.8 pF and 8.2 pF Analog control voltage Compatible with high voltage control IC
(STHVDAC series) Available in plastic molded package: µQFN package 1.2 x 1.6 x 0.9 mm Flip Chip 0.65 x 1.0 x 0.3 mm Flip Chip 0.65 x 1.2 x 0.3 mm ECOPACK® 2 compliant component
Benefit
RF tunable passive implementation in mobile
phones to optimize antenna radiated
performances.
Applications
Cellular Antenna tunable matching network in
multi-band GSM/WCDMA/LTE mobile phone Tunable RF filters Cellular tunable antenna LTE band tuning VSWR correction circuit
Description

The ST integrated tunable capacitor, offers
excellent RF performance, low power
consumption and high linearity required in
adaptive RF tuning applications. The fundamental
building block of PTIC is a tunable material called
Parascan, which is a version of barium strontium
titanate (BST) developed by Paratek microwave.
BST capacitances are tunable capacitances
intended for use in mobile phone application, and
dedicated to RF tunable applications. These
tunable capacitances are controlled through a
bias voltage ranging from 2 to 20 V. The use of
BST tunable capacitance in mobile phones
enables significant improvement in terms of
radiated performances making the performance
almost insensitive to the external environment.
TM: Parascan is a trade mark of Paratek microwave Inc.
Functional characteristics STPTIC
1 Functional characteristics
Figure 1. PTIC functional block diagram

Table 1. Signal descriptions
DocID023772 Rev 3 3/13
STPTIC Electrical characteristics
2 Electrical characteristics



Table 2. Absolute maximum ratings (limiting values)
Currently failing around 400 V, improvement on going to withstand 500 V on 2p7 and 3p3.
Table 3. Recommended operating conditions
Electrical characteristics STPTIC
4/13 DocID023772 Rev 3
Table 4. Representative performances (Tamb = 25 °C) F1 = 894 MHz, F2 = 849 MHz, P1 = 20 dBm, P2 = -15 dBm, 2f1 - f2 = 939 MHz 894 MHz, Pin = 34 dBm IP3 and harmonics are measured in the shunt/series configuration in a 50 Ω environment One or both of RFin and RFout must be connected to DC ground
STPTIC Package information
3 Package information
Epoxy meets UL94, V0 Lead-free package
In order to meet environmental requirements, ST offers these devices in different grades of
ECOPACK® packages, depending on their level of environmental compliance. ECOPACK®
specifications, grade definitions and product status are available at: .
ECOPACK® is an ST trademark.
Figure 2. µQFN-6L package dimension
Figure 3. Recommended PCB land pattern for µQFN-6L package
Package information STPTIC
6/13 DocID023772 Rev 3
Figure 4. Flip Chip dimensions (size for 1p5)
Figure 5. Flip Chip dimensions (size for 2p7, 3p3, 3p9, and 4p7)
Figure 6. Flip Chip dimensions (size for 5p6, 6p8, 8p2)
STPTIC Package information
Figure 7. Recommended PCB land pattern for Flip Chip package (metal defined pads,
solder mask 25 µm larger)
Figure 8. Recommended PCB land pattern for Flip Chip PTIC (die size 650 x 1200)
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