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STW40N20STN/a20avaiN-CHANNEL 200V
STP40N20STN/a378avaiN-CHANNEL 200V


STP40N20 ,N-CHANNEL 200VAbsolute Maximum ratingsSymbol Parameter Value UnitV Drain-source Voltage (V = 0) 200 VDS GSV Drain ..
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STP40N20-STW40N20
N-CHANNEL 200V
1/11February 2005
STP40N20
STW40N20

N-CHANNEL 200V - 0.038Ω - 40A TO-220/TO-247
LOW GATE CHARGE STripFET™ MOSFET
Table 1: General Features
TYPICAL RDS(on) = 0.038 Ω GATE CHARGE MINIMIZED VERY LOW INTRINSIC CAPACITANCES VERY GOOD MANUFACTURING
REPEATIBILITY EXCELLENT FIGURE OF MERIT (RDS*Qg) 100% AVALANCHE TESTED
DESCRIPTION

This MOSFET series realized with STMicroelec-
tronics unique STripFET process has specifically
been designed to minimize input capacitance and
gate charge. It is therefore suitable as primary
switch in advanced high-efficiency isolated DC-DC
converters.
APPLICATIONS
HIGH CURRENT, HIGH SPEED SWITCHING UPS
Table 2: Order Codes
Figure 1: Package
Figure 2: Internal Schematic Diagram

Rev. 2
STP40N20 - STW40N20
2/11
Table 3: Absolute Maximum ratings
) Pulse width limited by safe operating area
(1) ISD ≤ 40A, di/dt ≤ 200 A/µs, V DD ≤ V(BR)DSS, Tj ≤ TJMAX.
Table 4: Thermal Data
Table 5: Avalanche Characteristics
3/11
STP40N20 - STW40N20
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
Table 6: On/Off
Table 7: Dynamic
Table 8: Source Drain Diode

(1) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %.
(2) Pulse width limited by safe operating area.
STP40N20 - STW40N20
4/11
Figure 3: Safe Operating Area For TO-220
Figure 4: Safe Operating Area For TO-247
Figure 5: Output Characteristics
Figure 6: Thermal Impedance For TO-220
Figure 7: Thermal Impedance For TO-247
Figure 8: Transfer Characteristics
5/11
STP40N20 - STW40N20
Figure 9: Transconductance
Figure 10: Gate Charge vs Gate-source Voltage
Figure 11: Normalized Gate Threshold Voltage
vs Temperature
Figure 12: Static Drain-source On Resistance
Figure 13: Capacitance Variations
Figure 14: Normalized On Resistance vs Tem-
perature
6/11
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