IC Phoenix
 
Home ›  SS106 > STM705M6E-STM705M6F-STM706M6E-STM706M6F-STM707M6E-STM707M6F-STM708M6E-STM708M6F-STM813LM6E-STM813LM6F,5V Supervisor
STM705M6E-STM705M6F-STM706M6E-STM706M6F-STM707M6E Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
STM705M6ESTN/a6000avai5V Supervisor
STM705M6FSTN/a6000avai5V Supervisor
STM706M6ESTN/a5200avai5V Supervisor
STM706M6FSTN/a5200avai5V Supervisor
STM707M6ESTN/a5200avai5V Supervisor
STM707M6FSTN/a5200avai5V Supervisor
STM708M6ESTN/a5200avai5V Supervisor
STM708M6FSTN/a5200avai5V Supervisor
STM813LM6ESTN/a5200avai5V Supervisor
STM813LM6FSTN/a5200avai5V Supervisor


STM705M6E ,5V SupervisorBlock Diagram (STM707/708) . . . . . . 7Figure 10.Hardware Hookup . . . . . . . 8OPERATI ..
STM705M6F ,5V SupervisorLogic Diagram (STM705/706/813L) Figure 3.
STM706AM6F ,5V SupervisorBlock diagram (STM707/708) . . . . . .10Figure 9. Hardware hookup 10Figure 10. Reset o ..
STM706M6E ,5V SupervisorLogic Diagram (STM705/706/813L) . . 4Figure 3.
STM706M6F ,5V SupervisorFEATURES SUMMARY■ 5V OPERATING VOLTAGE Figure 1. Packages■ PRECISION V MONITORCC– STM705/707/813L4. ..
STM706PAM6F ,3V SupervisorBlock diagram (STM708T/S/R) . . . . . . 10Figure 9. Hardware hookup 10Figure 10. Reset o ..
SY58024UMI , ULTRA-LOW JITTER DUAL 2 × 2 CROSSPOINT SWITCH w/ CML OUTPUTS AND INTERNAL I/O TERMINATION
SY58025UMG , ULTRA PRECISION DUAL 2:1 CML MUX WITH INTERNAL I/O TERMINATION
SY58025UMG , ULTRA PRECISION DUAL 2:1 CML MUX WITH INTERNAL I/O TERMINATION
SY58026UMI , ULTRA PRECISION DUAL 2:1 LVPECL MUX WITH INTERNAL TERMINATION
SY58027UMG , ULTRA PRECISION DUAL 2:1 400mV LVPECL MUX WITH INTERNAL TERMINATION
SY58027UMG , ULTRA PRECISION DUAL 2:1 400mV LVPECL MUX WITH INTERNAL TERMINATION


STM705M6E-STM705M6F-STM706M6E-STM706M6F-STM707M6E-STM707M6F-STM708M6E-STM708M6F-STM813LM6E-STM813LM6F
5V Supervisor
1/26September 2004
STM705, STM706,
STM707, STM708, STM813L

5V Supervisor
FEATURES SUMMARY
5V OPERATING VOLTAGE PRECISION VCC MONITOR STM705/707/813L
4.50V ≤ VRST ≤ 4.75V STM706/708
4.25 ≤ VRST ≤ 4.50V RST AND RST OUTPUTS 200ms (TYP) trec WATCHDOG TIMER - 1.6sec (TYP) MANUAL RESET INPUT (MR) POWER-FAIL COMPARATOR (PFI/PFO) LOW SUPPLY CURRENT - 40µA (TYP) GUARANTEED RST (RST) ASSERTION
DOWN TO VCC = 1.0V OPERATING TEMPERATURE:
–40°C to 85°C (Industrial Grade)
Table 1. Device Options

Note:1. Push-pull Output
STM705/706/707/708/813L
TABLE OF CONTENTS
FEATURES SUMMARY . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

Figure 1. Packages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
Table 1. Device Options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
SUMMARY DESCRIPTION. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4

Figure 2. Logic Diagram (STM705/706/813L). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Figure 3. Logic Diagram (STM707/708) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Table 2. Signal Names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .4
Figure 4. STM705/706/813L SO8 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 5. STM705/706/813L TSSOP8 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 6. STM707/708 SO8 Connections. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Figure 7. STM707/708 TSSOP8 Connections . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin Descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

Table 3. Pin Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
Figure 8. Block Diagram (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Figure 9. Block Diagram (STM707/708) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
Figure 10.Hardware Hookup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8
OPERATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Reset Output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Push-button Reset Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Watchdog Input (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Watchdog Output (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Power-fail Input/Output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Ensuring a Valid Reset Output Down to VCC= 0V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

Figure 11.Reset Output Valid to Ground Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10
Interfacing to Microprocessors with Bi-directional Reset Pins . . . . . . . . . . . . . . . . . . . . . . . .10

Figure 12.Interfacing to Microprocessors with Bi-directional Reset I/O. . . . . . . . . . . . . . . . . . . . . .10
TYPICAL OPERATING CHARACTERISTICS . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

Figure 13.Supply Current vs. Temperature (no load) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Figure 14.VPFI Threshold vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
Figure 15.Reset Comparator Propagation Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . .12
Figure 16.Power-up trec vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Figure 17.Normalized Reset Threshold vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12
Figure 18.Watchdog Time-out Period vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Figure 19.PFI to PFO Propagation Delay vs. Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13
Figure 20.RST Output Voltage vs. Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Figure 21.RST Output Voltage vs. Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14
Figure 22.RST Response Time (Assertion). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Figure 23.RST Response Time (Assertion). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15
Figure 24.Power-fail Comparator Response Time (Assertion) . . . . . . . . . . . . . . . . . . . . . . . . . . . .16
Figure 25.Power-fail Comparator Response Time (De-Assertion) . . . . . . . . . . . . . . . . . . . . . . . . .16
3/26
STM705/706/707/708/813L

Figure 26.VCC to Reset Propagation Delay vs. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17
Figure 27.Maximum Transient Duration vs. Reset Threshold Overdrive. . . . . . . . . . . . . . . . . . . . .17
MAXIMUM RATING. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18

Table 4. Absolute Maximum Ratings. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
DC AND AC PARAMETERS. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

Table 5. Operating and AC Measurement Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Figure 28.AC Testing Input/Output Waveforms. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Figure 29.Power-fail Comparator Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19
Figure 30.MR Timing Waveform . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Figure 31.Watchdog Timing (STM705/706/813L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
Table 6. DC and AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20
PACKAGE MECHANICAL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

Figure 32.SO8 – 8-lead Plastic Small Outline, 150 mils body width, Package Mechanical. . . . . . .22
Table 7. SO8 – 8-lead Plastic Small Outline, 150 mils body width, Package Mechanical Data . .22
Figure 33.TSSOP8 – 8-lead, Thin Shrink Small Outline, 3x3mm body size, Outline . . . . . . . . . . .23
Table 8. TSSOP8 – 8-lead, Thin Shrink Small Outline, 3x3mm body size, Mechanical Data . . . .23
PART NUMBERING . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

Table 9. Ordering Information Scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
Table 10. Marking Description. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24
REVISION HISTORY. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25

Table 11. Document Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
STM705/706/707/708/813L
SUMMARY DESCRIPTION

The STM705/706/707/708/813L Supervisors are
self-contained devices which provide micropro-
cessor supervisory functions. A precision voltage
reference and comparator monitors the VCC input
for an out-of-tolerance condition. When an invalid
VCC condition occurs, the reset output (RST) is
forced low (or high in the case of RST).
These devices also offer a watchdog timer (except
for STM707/708) as well as a power-fail compara-
tor to provide the system with an early warning of
impending power failure.
These devices are available in a standard 8-pin
SOIC package or a space-saving 8-pin TSSOP
package.
5/26
STM705/706/707/708/813L
STM705/706/707/708/813L
Pin Descriptions
MR.A logic low on MR asserts the reset output.

Reset remains asserted as long as MR is low and
for trec after MR returns high. This active-low input
has an internal pull-up. It can be driven from a TTL
or CMOS logic line, or shorted to ground with a
switch. Leave open if unused.
WDI.
If WDI remains high or low for 1.6sec, the in-
ternal watchdog timer runs out and reset (or WDO)
is triggered. The internal watchdog timer clears
while reset is asserted or when WDI sees a rising
or falling edge.
The watchdog function can be disabled by allow-
ing the WDI pin to float.
WDO.It goes low when a transition does not oc-

cur on WDI within 1.6sec, and remains low until a
transition occurs on WDI (indicating the watchdog
interrupt has been serviced). WDO also goes low
when VCC falls below the reset threshold; howev-
er, unlike the reset output, WDO goes high as
soon as VCC exceeds the reset threshold.
Note: For those devices
with a WDO output, a
watchdog timeout will not trigger reset unless
WDO is connected to MR.
RST.Pulses low when triggered, and stays low

whenever VCC is below the reset threshold or
when MR is a logic low. It remains low for trec after
either VCC rises above the reset threshold, or MR
goes from low to high.
RST.
Goes high with triggered, and stays high
whenever VCC is above the reset threshold or
when MR is a logic high. It stays high for trec after
either VCC falls below the reset threshold, or MR
goes from high to low.
PFI.
When PFI is less than VPFI, PFO goes low;
otherwise, PFO remains high. Connect to ground
if unused.
PFO.When PFI is less than VPFI, PFO goes low;

otherwise, PFO remains high. Leave open if un-
used.
Table 3. Pin Description
7/26
STM705/706/707/708/813L
STM705/706/707/708/813L
Figure 10. Hardware Hookup

Note:1. For STM705/706/813L.
9/26
STM705/706/707/708/813L
OPERATION
Reset Output

The STM705/706/707/708/813L Supervisor as-
serts a reset signal to the MCU whenever VCC
goes below the reset threshold (VRST), a watch-
dog time-out occurs (if WDO is tied to MR), or
when the Push-button Reset Input (MR) is taken
low. RST is guaranteed to be a logic low (logic
high for STM707/708/813L) for VCC < VRST down
to VCC =1V for TA = 0°C to 85°C.
During power-up, once VCC exceeds the reset
threshold an internal timer keeps RST low for the
reset time-out period, trec. After this interval RST
returns high.
If VCC drops below the reset threshold, RST goes
low. Each time RST is asserted, it stays low for at
least the reset time-out period (trec). Any time VCC
goes below the reset threshold the internal timer
clears. The reset timer starts when VCC returns
above the reset threshold.
Push-button Reset Input

A logic low on MR asserts reset. Reset remains
asserted while MR is low, and for trec (see Figure
30., page 20) after it returns high. The MR input
has an internal 40kΩ pull-up resistor, allowing it to
be left open if not used. This input can be driven
with TTL/CMOS-logic levels or with open-drain/
collector outputs. Connect a normally open mo-
mentary switch from MR to GND to create a man-
ual reset function; external debounce circuitry is
not required. If MR is driven from long cables or
the device is used in a noisy environment, connect
a 0.1µF capacitor from MR to GND to provide ad-
ditional noise immunity. MR may float, or be tied to
VCC when not used.
Watchdog Input (STM705/706/813L)

The watchdog timer can be used to detect an out-
of-control MCU. If the MCU does not toggle the
Watchdog Input (WDI) within tWD (1.6sec), the re-
set is asserted. The internal 1.6sec timer is
cleared by either: a reset pulse, or by toggling WDI (high-to-low or low-to-high),
which can detect pulses as short as 50ns. If
WDI is tied high or low, a reset pulse is
triggered every 1.8sec (tWD + trec), if WDO is
connected to MR.
See Figure 31., page 20 for STM705/706/813L.
The timer remains cleared and does not count for
as long as reset is asserted. As soon as reset is re-
leased, the timer starts counting.
Note: The watchdog function may be disabled by

floating WDI or tri-stating the driver connected to
WDI. When tri-stated or disconnected, the maxi-
mum allowable leakage current is 10uA and the
maximum allowable load capacitance is 200pF.
Watchdog Output (STM705/706/813L)

When VCC drops below the reset threshold, WDO
will go low even if the watchdog timer has not yet
timed out. However, unlike the reset output, WDO
goes high as soon as VCC exceeds the reset
threshold. WDO may be used to generate a reset
pulse by connecting it to the MR input.
Power-fail Input/Output

The Power-fail Input (PFI) is compared to an inter-
nal reference voltage (independent from the VRST
comparator). If PFI is less than the power-fail
threshold (VPFI), the Power-Fail Output (PFO) will
go low. This function is intended for use as an un-
dervoltage detector to signal a failing power sup-
ply. Typically PFI is connected through an external
voltage divider (see Figure 10., page 8) to either
the unregulated DC input (if it is available) or the
regulated output of the VCC regulator. The voltage
divider can be set up such that the voltage at PFI
falls below VPFI several milliseconds before the
regulated VCC input to the STM705/706/707/708/
813L or the microprocessor drops below the mini-
mum operating voltage.
If the comparator is unused, PFI should be con-
nected to VSS and PFO left unconnected. PFO
may be connected to MR on the STM703/704/818
so that a low voltage on PFI will generate a reset
output.
STM705/706/707/708/813L
11/26
STM705/706/707/708/813L
STM705/706/707/708/813L
13/26
STM705/706/707/708/813L
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED