STLM75M2F ,Digital temperature sensor and thermal watchdogFeatures ■ Measures temperatures from –55°C to +125°C (–67°F to +257°F)– ±0.5°C (typ) accuracy– ±2° ..
STLV3243EBJR ,15KV ESD PROTECTED 2.3 TO 5.5V, 400KBPS, RS-232 TRANSCEIVER WITH AUTO-POWERDOWNapplications are notebooks, PDAs,a valid RS-562 signal, the driver outputs are smart-phones, hand-h ..
STLVD111BFR ,PROGRAMMABLE LOW VOLTAGE 1:10 DIFFERENTIAL CLOCK DRIVERSTLVD111PROGRAMMABLE LOW VOLTAGE1:10 DIFFERENTIAL LVDS CLOCK DRIVER■ 100ps PART-TO PART SKEW■ 50ps ..
STLVDS104BTR ,4-PORT LVDS AND 4-PORT TTL TO LVDS REPEATERSSTLVDS1044-PORT LVDS AND 4-PORT TTL-TO LVDSREPEATERS■ RECEIVER AND DRIVERS MEET OREXCEED THE REQUIR ..
STLVDS31BD ,HIGH SPEED DIFFERNTIAL LINE DRIVERSelectrical characteristics of low voltage differentialcoupling to the enviroment.signaling (LVDS). ..
STLVDS31BTR ,HIGH SPEED DIFFERNTIAL LINE DRIVERSSTLVDS31STLVDS3487HIGH SPEEDDIFFERENTIAL LINE DRIVERS ■ MEETS OR EXCEEDS THE REQUIREMENTS OF ANSI ..
SY10EL33ZG , 5V/3.3V ÷ 4 DIVIDER
SY10EL34LZI , 5V/3.3V ÷2, ÷4, ÷8 CLOCK GENERATION CHIP
SY10EL34ZC , 5V/3.3V ÷2, ÷4, ÷8 CLOCK GENERATION CHIP
SY10EL34ZC , 5V/3.3V ÷2, ÷4, ÷8 CLOCK GENERATION CHIP
SY10EL34ZG , 5V/3.3V ÷2, ÷4, ÷8 Clock Generation Chip
SY10EL34ZG , 5V/3.3V ÷2, ÷4, ÷8 Clock Generation Chip
STLM75DS2F-STLM75M2F
Digital temperature sensor and thermal watchdog
August 2010 Doc ID 13296 Rev 12 1/40
STLM75Digital temperature sensor and thermal watchdog
Features Measures temperatures from –55°C to +125°C
(–67°F to +257°F) ±0.5°C (typ) accuracy ±2°C (max) accuracy from –25°C to +100°C Low operating current: 125 µA (typ) No external components required 2-wire I2 C/SMBus-compatible serial interface Supports bus time-out feature Selectable bus address allows connection
of up to eight devices on the bus Wide power supply range-operating voltage
range: 2.7 V to 5.5 V Conversion time is 150 ms (max) Programmable temperature threshold and
hysteresis set points Pin- and software-compatible with LM75 (drop-
in replacement) Power-up defaults permit standalone operation
as a thermostat Shutdown mode to minimize power
consumption Output pin (open drain) can be configured for
interrupt or comparator/thermostat mode (dual
purpose event pin) Packages:
–SO8 MSOP8 (TSSOP8)
Contents STLM752/40 Doc ID 13296 Rev 12
Contents Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61.1 Serial communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2 T emperature sensor output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3 Pin descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.1 SDA (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.2 SCL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.3 OS/INT (open drain) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.4 GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.5 A2, A1, A0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
1.3.6 VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 102.1 Applications information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.2 Thermal alarm function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.3 Comparator mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4 Interrupt mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.5 Fault tolerance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.6 Shutdown mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
2.7 T emperature data format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
2.8 Bus timeout feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163.1 Registers and register set formats . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1.1 Command/pointer register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
3.1.2 Configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
3.1.3 Temperature register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1.4 Overlimit temperature register (TOS) . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
3.1.5 Hysteresis temperature register (THYS) . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.2 Power-up default conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
3.3 Serial interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4 2-wire bus characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4.1 Bus not busy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4.2 Start data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STLM75 ContentsDoc ID 13296 Rev 12 3/40
3.4.3 Stop data transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
3.4.4 Data valid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
3.4.5 Acknowledge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
3.5 READ mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
3.6 WRITE mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Typical operating characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 DC and AC parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 Part numbering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 Package marking information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
List of tables STLM75
4/40 Doc ID 13296 Rev 12
List of tables
Table 1. Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Table 2. Fault tolerance setting . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
Table 3. Relationship between temperature and digital output. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Table 4. Command/pointer register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Table 5. Register pointers selection summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 6. Configuration register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
Table 7. Temperature register format. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Table 8. TOS and THYS register format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Table 9. STLM75 serial bus slave addresses. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Table 10. Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Table 11. Operating and AC measurement conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Table 12. DC and AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Table 13. AC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Table 14. SO8 – 8-lead plastic small outline package mechanical data. . . . . . . . . . . . . . . . . . . . . . . 33
Table 15. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package
mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Table 16. Carrier tape dimensions for SO8 and MSOP8 (TSSOP8) packages . . . . . . . . . . . . . . . . . 35
Table 17. Reel dimensions for 12 mm carrier tape - SO8 and MSOP8 (TSSOP8) packages . . . . . . 36
Table 18. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37
Table 19. Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
STLM75 List of figures
Doc ID 13296 Rev 12 5/40
List of figures
Figure 1. Logic diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
Figure 2. Connections (SO8 and MSOP8/TSSOP8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 3. Functional block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Figure 4. Typical 2-wire interface connections diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Figure 5. OS output temperature response diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
Figure 6. Serial bus data transfer sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 7. Acknowledgement sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Figure 8. Slave address location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
Figure 9. Typical 2-byte READ from preset pointer location (e.g. temp - TOS, THYS) . . . . . . . . . . . . 24
Figure 10. Typical pointer set followed by an immediate READ for 2-byte register (e.g. temp). . . . . . 24
Figure 11. Typical 1-byte READ from the configuration register with preset pointer . . . . . . . . . . . . . . 24
Figure 12. Typical pointer set followed by an immediate READ from the configuration register . . . . . 25
Figure 13. Configuration register WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
Figure 14. TOS and THYS WRITE. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
Figure 15. Temperature variation vs. voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 16. Bus timing requirements sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 17. SO8 – 8-lead plastic small outline package mechanical drawing . . . . . . . . . . . . . . . . . . . . 33
Figure 18. MSOP8 (TSSOP8) – 8-lead, thin shrink small outline (3 mm x 3 mm) package
mechanical drawing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Figure 19. Carrier tape for SO8 and MSOP8 (TSSOP8) packages. . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Figure 20. Reel schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
Figure 21. Device topside marking information (SO8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Figure 22. Device topside marking information (MSOP8/TSSOP8). . . . . . . . . . . . . . . . . . . . . . . . . . . 38
Description STLM75
6/40 Doc ID 13296 Rev 12
1 Description
The STLM75 is a high-precision digital CMOS temperature sensor IC with a sigma-delta
temperature-to-digital converter and an I2 C-compatible serial digital interface. It is targeted
for general applications such as personal computers, system thermal management,
electronics equipment, and industrial controllers, and is packaged in the industry standard
8-lead TSSOP and SO8 packages.
The device contains a band gap temperature sensor and 9-bit ADC which monitor and
digitize the temperature to a resolution up to 0.5 °C. The STLM75 is typically accurate to
(±3 °C - max) over the full temperature measurement range of –55 °C to 125 °C with ±2 °C
accuracy in the –25 °C to +100 °C range. The STLM75 is pin-for-pin and software
compatible with the LM75B.
The STLM75 is specified for operating at supply voltages from 2.7 V to 5.5 V . Operating at
3.3 V, the supply current is typically (125 µA).
The on-board sigma-delta analog-to-digital converter (ADC) converts the measured
temperature to a digital value that is calibrated in degrees centigrade; for Fahrenheit
applications a lookup table or conversion routine is required.
The STLM75 is factory-calibrated and requires no external components to measure
temperature.
1.1 Serial communications
The STLM75 has a simple 2-wire I2 C-compatible digital serial interface which allows the
user to access the data in the temperature register at any time. It communicates via the
serial interface with a master controller which operates at speeds up to 400 kHz. Three pins
(A0, A1, and A2) are available for address selection, and enable the user to connect up to 8
devices on the same bus without address conflict.
In addition, the serial interface gives the user easy access to all STLM75 registers to
customize operation of the device.
STLM75 Description
Doc ID 13296 Rev 12 7/40
1.2 Temperature sensor output
The STLM75 temperature sensor has a dedicated open drain overlimit signal/interrupt
(OS/INT) output which features a thermal alarm function. This function provides a user-
programmable trip and turn-off temperature. It can operate in either of two selectable
modes: Comparator mode, and Interrupt mode.
At power-up the STLM75 immediately begins measuring the temperature and converting
the temperature to a digital value.
The measured temperature value is compared with a temperature limit (which is stored in
the 16-bit (TOS) READ/WRITE register), and the hysteresis temperature (which is stored in
the 16-bit (THYS) READ/WRITE register). If the measured value exceeds these limits, the
OS/INT pin is activated (see Figure 3 on page 8 and Table 2 on page 14).
Note: See Pin descriptions on page 9 for details.
Figure 1. Logic diagram SDA and OS/INT are open drain.
Description STLM75
8/40 Doc ID 13296 Rev 12
Figure 2. Connections (SO8 and MSOP8/TSSOP8) SDA and OS/INT are open drain.
Figure 3. Functional block diagram
Table 1. Signal names SDA and OS/INT are open drain.
STLM75 Description
Doc ID 13296 Rev 12 9/40
1.3 Pin descriptions
See Figure 1 on page 7 and Table 1 on page 8 for a brief overview of the signals connected
to this device.
1.3.1 SDA (open drain)
This is the serial data input/output pin for the 2-wire serial communication port.
1.3.2 SCL
This is the serial clock input pin for the 2-wire serial communication port.
1.3.3 OS/INT (open drain)
This is the overlimit signal/interrupt alert output pin. It is open drain, so it needs a pull-up
resistor. In Interrupt mode, it outputs a pulse whenever the measured temperature exceeds
the programmed threshold (TOS). It behaves as a thermostat, toggling to indicate whether
the measured temperature is above or below the threshold and hysteresis (THYS).
1.3.4 GND
Ground; it is the reference for the power supply. It must be connected to system ground.
1.3.5 A2, A1, A0
A2, A1, and A0 are selectable address pins for the 3 LSBs of the I2 C interface address.
They can be set to VDD or GND to provide 8 unique address selections.
1.3.6 VDD
This is the supply voltage pin, and ranges from +2.7 V to +5.5 V.
Operation STLM75
10/40 Doc ID 13296 Rev 12
2 Operation
After each temperature measurement and analog-to-digital conversion, the STLM75 stores
the temperature as a 16-bit two’s complement number (see Table 5: Register pointers
selection summary on page 17) in the 2-byte temperature register (see Table 7 on page 18).
The most significant bit (S) indicates if the temperature is positive or negative: for positive numbers S = 0, and for negative numbers S = 1.
The most recently converted digital measurement can be read from the temperature register
at any time. Since temperature conversions are performed in the background, reading the
temperature register does not affect the operation in progress.
The temperature data is provided by the 9 MSBs (bits 15 through 7). Bits 6 through 0 are
unused. Table 3 on page 15 gives examples of the digital output data and corresponding
temperatures. The data is compared to the values in the TOS and THYS registers, and then
the OS is updated based on the result of the comparison and the operating mode.
The alarm fault tolerance is controlled by the FT1 and FT0 bits in the configuration register.
They are used to set up a fault queue. This prevents false tripping of the OS/INT pin when
the STLM75 is used in a noisy environment (see Table 3 on page 15).
The active state of the OS output can be changed via the polarity bit (POL) in the
configuration register. The power-up default is active-low.
If the user does not wish to use the thermostat capabilities of the STLM75, the OS output
should be left floating.
Note: If the thermostat is not used, the TOS and THYS registers can be used for general storage of
system data.
STLM75 Operation
Doc ID 13296 Rev 12 11/40
2.1 Applications information
STLM75 digital temperature sensors are optimal for thermal management and thermal
protection applications. They require no external components for operations except for pull-
up resistors on SCL, SDA, and OS/INT outputs. A 0.1 µF bypass capacitor on VDD is
recommended. The sensing device of STLM75 is the chip itself. The typical interface
connection for this type of digital sensor is shown in Figure 4 on page11.
Intended applications include: System thermal management Computers/disk drivers Electronics/test equipment Power supply modules Consumer products Battery management Fax/printers management Automotive
Figure 4. Typical 2-wire interface connections diagram SDA and OS/INT are open drain.
Operation STLM75
12/40 Doc ID 13296 Rev 12
2.2 Thermal alarm function
The STLM75 thermal alarm function provides user-programmable thermostat capability and
allows the STLM75 to function as a standalone thermostat without using the serial interface.
The OS output is the alarm output. This signal is an open drain output, and at power-up, this
pin is configured with active-low polarity by default.
2.3 Comparator mode
In comparator mode, each time a temperature-to-digital (T-to-D) conversion occurs, the new
digital temperature is compared to the value stored in the TOS and THYS registers. If a fault
tolerance number of consecutive temperature measurements are greater than the value
stored in the TOS register, the OS output will be asserted.
For example, if the FT1 and FT0 bits are equal to “10” (fault tolerance = 4), four consecutive
temperature measurements must exceed TOS to activate the OS output. Once the OS
output is active, it will remain active until the first time the measured temperature drops
below the temperature stored in the THYS register.
When the thermostat is in comparator mode, the OS can be programmed to operate with
any amount of hysteresis. The OS output becomes active when the measured temperature
exceeds the TOS value a consecutive number of times as defined by the FT1 and FT0 fault
tolerance (FT) bits in the configuration register. The OS then becomes inactive when the
temperature falls below the value stored in THYS register for a consecutive number of times
as defined by the fault tolerance bits (FT1 and FT0). Putting the device into shutdown mode
does not clear OS in comparator mode.
STLM75 Operation
Doc ID 13296 Rev 12 13/40
2.4 Interrupt mode
In interrupt mode, the OS output first becomes active when the measured temperature
exceeds the TOS value a consecutive number of times as determined by the FT value in the
configuration register. Once activated, the OS can only be cleared by either putting the
STLM75 into shutdown mode or by reading from any register (temperature, configuration,
TOS, or THYS) on the device. Once the OS has been deactivated, it will only be reactivated
when the measured temperature falls below the THYS value a consecutive number of times
equal to the FT value. Figure 5 illustrates typical OS output temperature response.
Note: The OS can only be cleared by putting the device into shutdown mode or reading any
register. Thus, this interrupt/clear process is cyclical between the TOS and THYS events (i.e.,
TOS, clear, THYS, clear, TOS, clear, THYS, clear, and so forth). These interrupt mode resets
of the OS/INT pin occur only when the STLM75 is read or placed into shutdown mode.
Otherwise, OS/INT would remain active independently for any event.
Figure 5. OS output temperature response diagram These interrupt mode resets of O.S. occur only when STLM75 is read or placed in shutdown. Otherwise,
O.S. would remain active indefinitely for any event.
Operation STLM75
14/40 Doc ID 13296 Rev 12
2.5 Fault tolerance
For both comparator and interrupt modes, the alarm “fault tolerance” setting plays a role in
determining when the OS output will be activated. Fault tolerance refers to the number of
consecutive times an error condition must be detected before the user is notified. Higher
fault tolerance settings can help eliminate false alarms caused by noise in the system. The
alarm fault tolerance is controlled by the bits (4 and 3) in the configuration register. These
bits can be used to set the fault tolerance to 1, 2, 4, or 6 as shown in Table 2. At power-up,
these bits both default to logic '0'.
Note: OS output will be asserted one tCONV after fault tolerance is met, provided that the error
condition remains.
2.6 Shutdown mode
For power-sensitive applications, the STLM75 offers a low-power shutdown mode. The SD
bit in the configuration register controls shutdown mode. When SD is changed to logic '1,'
the conversion in progress will be completed and the result stored in the temperature
register, after which the STLM75 will go into a low-power standby state. The OS output will
be cleared if the thermostat is operating in Interrupt mode and the OS will remain
unchanged in comparator mode. The 2-wire interface remains operational in shutdown
mode, and writing a '0' to the SD bit returns the STLM75 to normal operation.
Table 2. Fault tolerance setting
STLM75 Operation
Doc ID 13296 Rev 12 15/40
2.7 Temperature data format
Table 3 shows the relationship between the output digital data and the external temperature. emperature data for the temperature, TOS, and THYS registers is represented as a 9-bit,
two’s complement word.
The left-most bit in the output data stream contains temperature polarity information for
each conversion. If the sign bit is '0', the temperature is positive and if the sign bit is '1,' the
temperature is negative.
2.8 Bus timeout feature
The STLM75 supports an SMBus compatible timeout function which will reset the serial 2 C/SMBus interface if SDA is held low for a period greater than the timeout duration
between a START and STOP condition. If this occurs, the device will release the bus and
wait for another START condition.
Table 3. Relationship between temperature and digital output
Functional description STLM75
16/40 Doc ID 13296 Rev 12
3 Functional description
The STLM75 registers have unique pointer designations which are defined in Table 5 on
page 17. Whenever any READ/WRITE operation to the STLM75 register is desired, the user
must “point” to the device register to be accessed.
All of these user-accessible registers can be accessed via the digital serial interface at
anytime (see Serial interface on page 20), and they include: Command register/address pointer register Configuration register Temperature register Overlimit signal temperature register (TOS) Hysteresis temperature register (THYS)
3.1 Registers and register set formats
3.1.1 Command/pointer register
The most significant bits (MSBs) of the command register must always be zero. Writing a '1'
into any of these bits will cause the current operation to be terminated (bit 2 through bit 7
must be kept '0', see Table4).
The command register retains pointer information between operations (see Table5).
Therefore, this register only needs to be updated once for consecutive READ operations
from the same register. All bits in the command register default to '0' at power-up.
Table 4. Command/pointer register format
STLM75 Functional description
Doc ID 13296 Rev 12 17/40
3.1.2 Configuration register
The configuration register is used to store the device settings such as device operation
mode, OS operation mode, OS polarity, and OS fault queue.
The configuration register allows the user to program various options such as thermostat
fault tolerance, thermostat polarity, thermostat operating mode, and shutdown mode. The
user has READ/WRITE access to all of the bits in the configuration register except the MSB
(Bit7), which is reserved as a “Read only” bit (see Table 6). The entire register is volatile and
thus powers-up in its default state only.
Table 5. Register pointers selection summary
Table 6. Configuration register format
Keys: SD = shutdown control bit FT1 = fault tolerance1 bit
M = thermostat mode(1) Bit 5 = must be set to '0'.
POL = output polarity(2) Bit 6 = must be set to '0'.
FT0 = fault tolerance0 bit Bit 7 = must be set to '0'. Reserved. Indicates operation mode; 0 = comparator mode, and 1 = interrupt mode (see Comparator mode and Interrupt mode on
page13). The OS is active-low ('0').
Functional description STLM75
18/40 Doc ID 13296 Rev 12
3.1.3 Temperature register
The temperature register is a two-byte (16-bit) “Read only” register (see Table 7 on
page 18). Digital temperatures from the T-to-D converter are stored in the temperature
register in two’s complement format, and the contents of this register are updated each time
the T-to-D conversion is finished.
The user can read data from the temperature register at any time. When a T-to-D
conversion is completed, the new data is loaded into a comparator buffer to evaluate fault
conditions and will update the temperature register if a read cycle is not ongoing. If a READ
is ongoing, the previous temperature will be read. Accessing the STLM75 continuously
without waiting at least one conversion time between communications will prevent the
device from updating the temperature register with a new temperature conversion result.
Consequently, the STLM75 should not be accessed continuously with a wait time of less
than tCONV (max).
All unused bits following the digital temperature will be zero. The MSB position of the
temperature register always contains the sign bit for the digital temperature, and Bit14
contains the temperature MSB. All bits in the temperature register default to zero at power-
up.
Note: These are comparable formats to the LM75.
3.1.4 Overlimit temperature register (TOS)
The TOS register is a two-byte (16-bit) READ/WRITE register that stores the user-
programmable upper trip-point temperature for the thermal alarm in two’s complement
format (see Table 8 on page 19). This register defaults to 80 °C at power-up (i.e., 0101 0000
0000 0000).
The format of the TOS register is identical to that of the temperature register. The MSB
position contains the sign bit for the digital temperature and Bit14 contains the temperature
MSB.
For 9-bit conversions, the trip-point temperature is defined by the 9 MSBs of the TOS
register, and all remaining bits are “Don’t cares”.
Table 7. Temperature register format
Keys: SB = two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TDx = temperature data bits
STLM75 Functional description
Doc ID 13296 Rev 12 19/40
3.1.5 Hysteresis temperature register (T HYS)
THYS register is a two-byte (16-bit) READ/WRITE register that stores the user-
programmable lower trip-point temperature for the thermal alarm in two’s complement
format (see Table 8). This register defaults to 75 °C at power-up (i.e., 0100 1011 0000
0000).
The format of this register is the same as that of the temperature register. The MSB position
contains the sign bit for the digital temperature and bit14 contains the temperature MSB.
Note: These are comparable formats to the DS75 and LM75.
3.2 Power-up default conditions
The STLM75 always powers up in the following default states: Thermostat mode = comparator mode Polarity = active-low Fault tolerance = 1 fault (i.e., relevant bits set to '0' in the configuration register) TOS = 80 °C THYS = 75 °C Register pointer = 00 (temperature register)
Note: After power-up these conditions can be reprogrammed via the serial interface.
Table 8. TOS and THYS register format
Keys: SB = two’s complement sign bit
TMSB = temperature MSB
TLSB = temperature LSB
TD = temperature data
Functional description STLM75
20/40 Doc ID 13296 Rev 12
3.3 Serial interface
Writing to and reading from the STLM75 registers is accomplished via the two-wire serial
interface protocol which requires that one device on the bus initiates and controls all READ
and WRITE operations. This device is called the “master” device. The master device also
generates the SCL signal which provides the clock signal for all other devices on the bus.
These other devices on the bus are called “slave” devices. The STLM75 is a slave device
(see Table 9). Both the master and slave devices can send and receive data on the bus.
During operations, one data bit is transmitted per clock cycle. All operations follow a
repeating, nine-clock-cycle pattern that consists of eight bits (one byte) of transmitted data
followed by an acknowledge (ACK) or not acknowledge (NACK) from the receiving device.
Note: There are no unused clock cycles during any operation, so there must not be any breaks in
the data stream and ACKs/NACKs during data transfers. Consequently, having too few
clock cycles can lead to incorrect operation if an inadvertent 8-bit READ from a 16-bit
register occurs. So, the entire word must be transferred out regardless of the superflous
trailing zeroes.
3.4 2-wire bus characteristics
The bus is intended for communication between different ICs. It consists of two lines: a bi-
directional data signal (SDA) and a clock signal (SCL). Both the SDA and SCL lines must be
connected to a positive supply voltage via a pull-up resistor.
The following protocol has been defined: Data transfer may be initiated only when the bus is not busy. During data transfer, the data line must remain stable whenever the clock line is high. Changes in the data line, while the clock line is high, will be interpreted as control
signals.
Accordingly, the following bus conditions have been defined (see Figure 6 on page 21):
3.4.1 Bus not busy
Both data and clock lines remain high.
3.4.2 Start data transfer
A change in the state of the data line, from high to low, while the clock is high, defines the
START condition.
3.4.3 Stop data transfer
A change in the state of the data line, from low to high, while the clock is high, defines the
STOP condition.
Table 9. STLM75 serial bus slave addresses
