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STI5189-EYB |STI5189EYBstN/a26avaiLow-cost QPSK demodulator and MPEG2 decoder for set-top box applications


STI5189-EYB ,Low-cost QPSK demodulator and MPEG2 decoder for set-top box applicationsapplications CPU– FPU, MMU, 32K instruction, 32K data, 2-way, set-associative caches– Supports OS21 ..
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STI5189-EYB
Low-cost QPSK demodulator and MPEG2 decoder for set-top box applications
Data brief
July 2009 Doc ID 15458 Rev 3 1/9
STi5189

Low-cost QPSK demodulator and MPEG2 decoder
for set-top box applications
Features
DVB-S compliant QPSK demodulation and DiSEqC™ controller MPEG2 MP@ML video decoding Audio decoding (MPEG1, 2, MP3, Dolby Digital
5.1) Linux and OS21 compatible ST40 applications
CPU (350 MHz) 16-bit SDR/DDR1 compatible local memory
interface Multi-stream, DVR capable, transport stream
processing Extensive connectivity (USB 2.0 host/ULPI,
Ethernet MAC MII/RMII, DVB-CI) External memory interface supporting NOR,
NAND and serial Flash Advanced security features, compatible with
the latest CA requirements Satellite STBs can be produced with very small
BOM and two-layer PCBs Active and passive low power modes Integrated voltage regulator Two package options: PBGA 23x23
and LFBGA 15x15
Description

The STi5189 integrates in a single IC, QPSK
demodulation, FEC, Multi-stream transport
demultiplexing, an applications CPU, audio/video
decode, video processing, graphics and display,
advanced security, STB peripherals, audio/video
DACs, digital audio/video outputs, USB 2.0 host
controller/ULPI and an Ethernet MAC MII/RMII
interface.
Introduction STi5189
2/9 Doc ID 15458 Rev 3
1 Introduction

The STi5189 uses state of the art process technology to provide an ultra low cost, full
featured, SD set-top box SOC. It is a highly integrated solution combining QPSK
(Quadrature Phase Shift Keying) demodulation, audio/video decoding and applications
processing into a single chip, suitable for MPEG2 based satellite networks worldwide.
The STi5189 provides a solution for operators to specify a range of low cost SD STBs
including low cost Zappers, Interactive STBs and DVR-capable STBs, with content delivery
using broadcast or broadband networks, or both (Hybrid STBs).
The STi5189 is optimized for secure Pay-TV applications with integrated DVB, DES, Multi2
and ICAM descramblers and smartcard interfaces. It also has advanced security features
normally found in mid-to-high end devices to further safeguard operator and content
investment.
The STi5189 offers enhancements in performance, features and integration to current users
of ST’s MPEG2 SD family of audio/video decoders and QPSK demodulators, whilst
reducing cost and time-to-market for the next generation of deployments. Few external
components are required to realize a complete STB solution, resulting in very low BOM
cost.
Combines a configurable DVB-S QPSK
demodulator with STB decoding and display
functions
This highly integrated SoC helps to reduce board
area and manufacturing cost, allowing low-cost,
small size STBs to be designed for DVB-S
networks
ST40-300 applications CPU @350MHz,
32K I cache, 32K D cache
Up to 580 DMIPs superscalar performance from a
single CPU core, using standard tools and
operating systems (Linux, OS21)
STMicroelectronics' Delta video decoding
system with Blitter display
Allows dual SD decoding of MPEG2 video with PIP
capability
Integrated USB 2.0 host,
Ethernet MAC with MII/RMII,
Enables connectivity to HDD for PVR systems and
to Ethernet networks for IP TV and hybrid/IP STBs
Low power process, design and architecture Low operating power consumption (<1W).
Best in class, low power standby mode (0.1W).
Fast resume from standby.
Available in 15x15 package with ballout
optimized for 2-layer PCBs
Reduced board manufacturing costs and board
size
Support for Serial Flash including secure boot. Allows low cost BOM, and safeguards boot code
integrity
STi5189 Introduction
Doc ID 15458 Rev 3 3/9
1.1 Features summary

The STi5189 has the following features: Embedded QPSK demodulator Fast channel acquisition Compatible with direct conversion tuners Digital carrier and timing recovery loops DVB-S decoding Up to 60 Msps operation Automatic spectral inversion ambiguity resolution Digital cancellation of A/D offset Digital Nyquist root filter High performance CPU for applications, middleware, drivers, audio decoding and
network protocols ST40-300, dual-issue, applications CPU FPU, MMU, 32K instruction, 32K data, 2-way, set-associative caches Supports OS21 and Linux operating systems Target speed > 350 MHz delivering >580DMIPs Single, 16-bit wide, unified local memory interface Supports both SDR SDRAM up to 166 MHz and DDR1 SDRAM up to 200 MHz MPEG2 MP@ML video decoder, dual SD decoding/PIP capable Audio sub-system MPEG-1 layers I/II decoding MP3 decoding Dolby Digital 5.1 decoding and down mix to Stereo/Pro-logic Concurrent decoding of audio description Optional feature: BTSC stereo encoding PCM mixing with sample rate conversion Simultaneous audio decode and output of Dolby streams on S/PDIF
IEC60958/IEC61937 digital audio output interface Integrated stereo audio DAC system Programmable external memory interface Four separately configurable banks, 8/16-bit wide SRAM, peripheral, NOR Flash, NAND Flash, Burst Mode Flash support Boot from NOR or NAND Flash Support for DVB-CI module host interface Interface to, and boot from, Serial FLASH via high speed SPI interface Dual output read support Graphics/Display processing High performance 2-D graphics blitter accelerator and display compositor, Link list
control
Introduction STi5189
4/9 Doc ID 15458 Rev 3 Multi-plane video/graphics composition with alpha blending, typical four-plane use
case (background color + still plane + video plane + OSD plane), and integrated
Tile RAM bandwidth saver for enhanced performance High quality horizontal and vertical reformatting and resizing, with sample rate
conversion/filtering for video and graphics 8 bpp CLUT and 16 bpp true color graphics formats supported Advanced anti-flicker filtering De-interlacing SD to 480p/576p for HDMI output Display output PAL/NTSC/SECAM encoder Encoding of CGMS, Teletext, WSS, VPS, Closed Caption MacrovisionTM 7.1D copy protection Four 10-bit video DACs, outputting RGB/CVBS/YC analog video signals High drive-capability on one of the video DACs for CVBS output without buffering 8-bit digital video output (DVO), compliant with ITU-R BT 601/656 formats 54 MHz output data rate on DVO supporting 480p/576p output over 8 bits DVR capable transport sub-system TS reception from internal QPSK demodulator External TS interface for a second stream input from external tuner/demodulator Dual internal TS from memory for network/IP stream input and DVR playback TS output for routing to DVB-CI module DVB-compliant, triple-stream transport de-multiplexing DVB, DES, Multi2 descrambling DVR supported with HDD attachment via EIDE (PIO mode) or USB 2.0 Multi-channel flexible DMA Controller Connectivity 10/100 Ethernet MAC with MII/RMII interface to external PHY USB 2.0 Host Controller with ULPI interface to external PHY On-chip STB Peripherals Two Smartcard Interfaces with integrated clock generation Four UARTs with Tx and Rx FIFOs Three SSCs for I²C/SPI master/slave interfaces, one of which can be dedicated for
tuner control with minimum tuner disturbance Five 8-bit GPIO banks with alternate functions Infrared transmitter/receiver
–PWM CEC line controller System services All clocks generated from a single external crystal Integrated DCO for clock recovery Low power/RTC/watchdog controller JTAG/TAP interface
STi5189 Introduction
Doc ID 15458 Rev 3 5/9 Advanced security Secure control words Code authentication JTAG interface locking DVR copy protection On chip 1V (nominal) voltage regulator Two package options 23 mm x 23 mm. Full specification 15 mm x 15 mm. No EMI. Boot from serial Flash only
1.2 Package options

The STi5189 is available in two package options, 15 mm x 15 mm LFBGA, 0.8 mm pitch
and 23 mm x 23 mm PBGA, 0.8 mm pitch. Both package types are compatible with the
design of two-layer PCBs. mm x 15 mm PBGA, 0.8 mm pitch
This is the main stream, low cost option which does not include the EMI interface. Both
Ethernet and USB 2.0 interfaces are still available. For this option the Flash used must be
Serial NOR Flash attached to the High Speed SPI interface. mm x 23 mm PBGA, 0.8 mm pitch
This option should be selected if a full specification device is required, which includes the
EMI. Any Flash type (Serial NOR, Parallel NOR, NAND) can be used with this package. The
following features are available with this package option: All the features as in the BGA15 mmx15 mm package DVB-CI support NAND Flash storage EMI interfaces available, Secure Boot from any Flash (Serial, NAND or NOR) HDD attachment via EIDE
With this package, DVB-CI and Ethernet are mutually exclusive options.
Table 1. Comparison table
Introduction STi5189
6/9 Doc ID 15458 Rev 3
1.3 Target applications

The following diagrams show typical applications of the STi5189. The first two use the mmx15 mm package version. The other application use the 23 mmx23 mm package
version.
Figure 1. MPEG2 broadcast satellite STB (basic zapper)
Muxed with Ethernet pins. Muxed with Ethernet pins.
Table 1. Comparison table (continued)
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