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STDP3100-AB |STDP3100ABSTN/a66avaiDisplayPort to VGA converter


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STDP3100-AB
DisplayPort to VGA converter
January 2013 Doc ID 15121 Rev 2 1/7
STDP3100

DisplayPort to VGA converter
Data brief
Features
Two lane DisplayPort™ 1.2a receiver Triple 10-bit video DAC 162 MSPS throughput rate VSIS compatible RGB output with 0 to 700 mV range 3.3 V HSYNC, VSYNC Resolution through WUXGA EDID, MCCS pass-through support 3.3V DDC output signals Sink detection logic Low power operation – Active 400 mW,
standby mode 15 mW Package: 64-pin LQFP, 10 x 10 mm
Applications
DisplayPort to VGA dongle as an attachment to
Notebook and Desktop PCs DisplayPort to VGA conversion for Notebook
and Desktop PC motherboard applications














Description STDP3100
2/7 Doc ID 15121 Rev 2
1 Description

STDP3100 is a DisplayPort to VGA signal format converter for interfacing next generation
DisplayPort based PC and notebook computers with conventional VGA displays, such as
CRT, LCD monitors, and projectors. DisplayPort offers a unified, scalable, and cost effective
interface for embedded and external display applications. As desktop and notebook PCs are
increasingly transitioning from conventional analog type interfaces to DisplayPort,
STDP3100 facilitates the transition by offering seamless connectivity between new
DisplayPort PC and notebooks and the installed base VGA monitors and projectors.
STDP3100 is a highly integrated converter featuring a DisplayPort receiver, video DAC,
clock form generator, test pattern generator, and sink detection block. In addition,
STDP3100 includes EDID and MCCS pass-through features, forming a fully transparent
operation between the PC and display. Active power consumption of this device is as low as
400mW, and thus it can be powered by the DisplayPort source when used in dongle
application. The device has a built in sink detection feature that determines the active and
standby state. The device enters into standby (low power) state whenever the VGA cable is
disconnected and returns to normal operation when the cable is connected back.
STDP3100 supports video resolutions from VGA through WUXGA. The input DisplayPort
interface consists of two main lanes, AUX channel, and HPD signal that maps directly to a
standard DisplayPort connector via two layers PCB. The output interface consists of analog
R, G, B video, Hsync, Vsync, and DDC signals. Analog video signal amplitude ranges from 0
to 700mV from a 10 bit video DAC with maximum sampling frequency of 162 MHz. The VGA
output signal interface conforms to the VSIS standards with separate Hsync and Vsync
control signals. The DDC_SDA and DDC_CLK signals are driven from an I2C master, which
controls I2C traffic between the DisplayPort AUX channel and external slave device.
ST offers STDP3100 designers kit with complete reference hardware and firmware.
Figure 1. System diagram
STDP3100 Benefits
Doc ID 15121 Rev 2 3/7
2 Benefits
Production-proven DisplayPort receiver from the DisplayPort leader Comprehensive feature set for DisplayPort to VGA dongle and for notebook embedded
application Proven interoperability with DisplayPort sources from all major graphics vendors Cost savings due to optimized BOM, low power, low EMI, and small form factor DisplayPort CTS compliant
Feature attributes STDP3100
4/7 Doc ID 15121 Rev 2
3 Feature attributes
DisplayPort 1.2a compliant receiver offering 5.4 Gbps bandwidth over 2 lanes Integrated triple 10-bit, 162 MHz video DAC for analog VGA signal output Supports up to 1080p, 1920 x 1200 reduced blanking video resolution EDID and MCCS pass-through from PC source to display Spread Spectrum (de-spreading) for EMI reduction Automatic sink detection Low power standby mode operation initiated based on sink detection status SPI interface with external Serial Flash for storing firmware and system configuration
data for customization purposes Optional two-wire host interface for device configuration using external controller UART interface for chip debug and development purposes ISP over DP AUX channel General purpose I/O pins for system usage Powered from DisplayPort source 3.3 V IO, 1.2 V Core 64-pin LQFP (10 x 10 mm) package
STDP3100 Ordering information
Doc ID 15121 Rev 2 5/7
4 Ordering information

b Table 1. Order codes
Revision history STDP3100
6/7 Doc ID 15121 Rev 2
5 Revision history

Table 2. Document revision history
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