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STD70NS04ZL
N-channel 40V, DPAK, Power MOSFETs
October 2009 Doc ID 16344 Rev 1 1/13
STD70NS04ZLN-channel clamped 9.5 mΩ , 70 A DP AK
fully protected SAFeFET™ Power MOSFET
Low capacitance and gate charge 100% avalanche tested 175 °C maximum junction temperature
Applications Switching applications ABS, solenoid drivers Motor control
–DC-DC converters
DescriptionThis fully clamped Power MOSFET is produced
by using the latest advanced company’s Mesh
OVERLAY process which is based on a novel
strip layout. The inherent benefits of the new
technology coupled with the extra clamping
capabilities make this product particularly suitable
for the harshest operation conditions such as
those encountered in the automotive
environment. Any other application requiring extra
ruggedness is also recommended.
Figure 1. Internal schematic diagram
Features
Table 1. Device summary
Contents STD70NS04ZL2/13 Doc ID 16344 Rev 1
Contents Electrical ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.1 Electrical characteristics (curves) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Test circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Packaging mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
STD70NS04ZL Electrical ratings
Doc ID 16344 Rev 1 3/13
1 Electrical ratings
Table 2. Absolute maximum ratings Voltage is limited by zener diodes Pulse width limited by safe operating area
Table 3. Thermal data When mounted on 1 inch² 2 oz. FR4 Cu.
Table 4. Avalanche data
Electrical characteristics STD70NS04ZL
4/13 Doc ID 16344 Rev 1
2 Electrical characteristics
(TCASE=25 °C unless otherwise specified)
Table 5. On/off states Gate Oxide, without zener diodes, tested at wafer sorting (IGSS < ± 100nA @ ± 20V Tj=25°) (see Figure 17) for electrical schematics
Table 6. Dynamic Pulsed: pulse duration=300µs, duty cycle 1.5%
STD70NS04ZL Electrical characteristics
Doc ID 16344 Rev 1 5/13
Table 7. Source drain diode Pulse width limited by safe operating area Pulsed: pulse duration=300µs, duty cycle 1.5%
Electrical characteristics STD70NS04ZL
6/13 Doc ID 16344 Rev 1
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area Figure 3. Thermal impedance
Figure 4. Output characteristics Figure 5. Transfer characteristics
Figure 6. Normalized BVDSS vs temperature Figure 7. Static drain-source on resistance
STD70NS04ZL Electrical characteristics
Doc ID 16344 Rev 1 7/13
Figure 8. Gate charge vs gate-source voltage Figure 9. Capacitance variations
Figure 10. Normalized gate threshold voltage
vs temperature
Figure 11. Normalized on resistance vs
temperature
Figure 12. Source-drain diode forward
characteristics
