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STD22NM20NSTN/a25200avaiN-CHANNEL 200V
STD22NM20NT4STN/a25200avaiN-CHANNEL 200V


STD22NM20N ,N-CHANNEL 200VFeatures Figure 1: PackageTYPE V R IDSS DS(on) DSTD22NM20N 200 V < 0.105 Ω 22 A

STD22NM20N-STD22NM20NT4
N-CHANNEL 200V
1/10June 2005
STD22NM20N

N-CHANNEL 200V - 0.088Ω - 22A DPAK
ULTRA LOW GATE CHARGE MDmesh™ II MOSFET
Rev. 4
STD22NM20N
2/10
Table 3: Absolute Maximum ratings

(*) ISD ≤ 22A, di/dt ≤ 400A/µs, V DD = 80% V(BR)DSS
Table 4: Thermal Data

(*) When mounted on 1 inch² FR-4 board, 2 oz Cu, t ≤ 10 sec
Table 5: Avalanche Characteristics
3/10
STD22NM20N
ELECTRICAL CHARACTERISTICS (TCASE =25°C UNLESS OTHERWISE SPECIFIED)
Table 6: On/Off
Table 7: Dynamic

(**) Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS increases from 0 to 80% VDSS
Table 8: Source Drain Diode

(1) Pulse width limited by safe operating area.
(2) Pulsed: Pulse duration = 300 µs, duty cycle 1.5 %
STD22NM20N
4/10
Figure 3: Safe Operating Area
Figure 4: Output Characteristics
Figure 5: Transconductance
Figure 6: Thermal Impedance
Figure 7: Transfer Characteristics
Figure 8: Static Drain-source On Resistance
5/10
STD22NM20N
Figure 9: Gate Charge vs Gate-source Voltage
Figure 10: Normalized Gate Thereshold Volt-
age vs Temperature
Figure 11: Source-Drain Diode Forward Char-
acteristics
Figure 12: Capacitance Variations
Figure 13: Normalized On Resistance vs Tem-
perature
Figure 14: Normalized BVdss vs Temperature
STD22NM20N
6/10
Figure 15: Unclamped Inductive Load Test Cir-
cuit
Figure 17: Test Circuit For Inductive Load
Switching and Diode Recovery Times
Figure 18: Unclamped Inductive Wafeform

Figure 19: Gate Charge Test Circuit

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