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STB8NM60T4STN/a1700avaiN-CHANNEL 650V@Tjmax


STB8NM60T4 ,N-CHANNEL 650V@TjmaxAbsolute maximum ratingsValueSymbol Parameter UnitTO-220 IPAKTO-220FPD²PAK DPAKV Gate-source voltag ..
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STB8NM60T4
N-CHANNEL 650V@Tjmax
October 2008 Rev 17 1/18
STD5NM60STB8NM60 - STP8NM60

N-channel 650 V@Tjmax, 0.9 Ω, 8 A MDmesh™ Power MOSFET
TO-220, TO-220FP , D2P AK, DP AK, IP AK
Features
100% avalanche tested HIgh dv/dt and avalanche capabilities Low input capacitance and gate charge Low gate input resistance
Application
Switching applications
Description

The MDmesh™ is a new revolutionary Power
MOSFET technology that associates the multiple
drain process with the company’s PowerMESH™
horizontal layout. The resulting product has an
outstanding low on-resistance, impressively high
dv/dt and excellent avalanche characteristics. The
adoption of the company’s proprietary strip
technique yields overall dynamic performance
that is significantly better than that of similar
competition’s products.
Figure 1. Internal schematic diagram


Table 1. Device summary
Electrical ratings STP8NM60, STD5NM60, STB8NM60
2/18
1 Electrical ratings
Table 1. Absolute maximum ratings
Limited only by maximum temperature allowed Pulse width limited by safe operating area ISD ≤ 5 A, di/dt ≤ 400 A/µs, VDD = 80%V(BR)DSS
Table 2. Thermal resistance
Table 3. Avalanche data
STP8NM60, STD5NM60, STB8NM60 Electrical characteristics
3/18
2 Electrical characteristics

(TCASE = 25 °C unless otherwise specified)
Table 4. On/off states
Table 5. Dynamic
Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
Electrical characteristics STP8NM60, STD5NM60, STB8NM60
4/18
Table 6. Switching times
Table 7. Source drain diode
Pulse width limited by safe operating area Pulsed: pulse duration=300µs, duty cycle 1.5%
STP8NM60, STD5NM60, STB8NM60 Electrical characteristics
5/18
2.1 Electrical characteristics (curves)
Figure 2. Safe operating area for TO-220/
D²PAK
Figure 3. Thermal impedance for TO-220/
D²PAK
Figure 4. Safe operating area for TO-220FP Figure 5. Thermal impedance for TO-220FP
Figure 6. Safe operating area for DPAK/IPAK Figure 7. Thermal impedance for DPAK/IPAK
Electrical characteristics STP8NM60, STD5NM60, STB8NM60
6/18
Figure 8. Output characteristics Figure 9. Transfer characteristics
Figure 10. Transconductance Figure 11. Static drain-source on resistance
Figure 12. Gate charge vs gate-source voltage Figure 13. Capacitance variations
STP8NM60, STD5NM60, STB8NM60 Electrical characteristics
7/18
Figure 14. Normalized gate threshold voltage
vs temperature
Figure 15. Normalized on resistance vs
temperature
Figure 16. Source-drain diode forward
characteristics
Test circuit STP8NM60, STD5NM60, STB8NM60
8/18 Test circuit
Figure 17. Switching times test circuit for
resistive load
Figure 18. Gate charge test circuit
Figure 19. Test circuit for inductive load
switching and diode recovery times
Figure 20. Unclamped inductive load test
circuit
Figure 21. Unclamped inductive waveform Figure 22. Switching time waveform
STP8NM60, STD5NM60, STB8NM60 Package mechanical data
9/18 Package mechanical data
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOP ACK specifications are available at:
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