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Partno	Mfg	Dc	Qty	Available	Descript
STB10NC50T4	ST	N/a	4800	avai	N-CHANNEL 500V

STB10NC50T4 ,N-CHANNEL 500VSTB10NC50-1®2 2N - CHANNEL 500V - 0.48Ω - 10A - I PAK/D PAKPowerMESH™ MOSFETPRELIMINARY DATATYPE V ..
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STB10NC50T4
N-CHANNEL 500V
STB10NC50-1
N - CHANNEL 500V - 0.48Ω - 10A - I2 PAK/D2 PAK
PowerMESH MOSFET
PRELIMINARY DATA TYPICAL RDS(on) = 0.48 Ω EXTREMELY HIGH dv/dt CAPABILITY 100% AVALANCHE TESTED VERY LOW INTRINSIC CAPACITANCES GATE CHARGE MINIMIZED
DESCRIPTION
Using the latest high voltage MESH OVERLAY
process, STMicroelectronics has designed an
advanced family of power MOSFETs with
outstanding performances. The new patent
pending strip layout coupled with the Company’s
proprietary edge termination structure, gives the
lowest RDS(on) per area, exceptional avalanche
and dv/dt capabilities and unrivalled gate charge
and switching characteristics.
APPLICATIONS HIGH CURRENT, HIGH SPEED SWITCHING SWITCH MODE POWER SUPPLIES (SMPS) DC-AC CONVERTERS FOR WELDING
EQUIPMENT AND UNINTERRUPTIBLE
POWER SUPPLIES AND MOTOR DRIVE
December 1999
ABSOLUTE MAXIMUM RATINGS
(•) Pulse width limited by safe operating area (1) ISD ≤ 10 A, di/dt ≤100 A/μs, VDD ≤ V(BR)DSS, Tj ≤ TJMAX
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THERMAL DATA
AVALANCHE CHARACTERISTICS
ELECTRICAL CHARACTERISTICS (Tcase = 25 o C unless otherwise specified)
OFF
ON (∗)
DYNAMIC
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ELECTRICAL CHARACTERISTICS (continued)
SWITCHING ON
SWITCHING OFF
SOURCE DRAIN DIODE
(∗) Pulsed: Pulse duration = 300 μs, duty cycle 1.5 %
(•) Pulse width limited by safe operating area
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Fig. 1: Unclamped Inductive Load Test Circuit
Fig. 3: Switching Times Test Circuits For
Resistive Load
Fig. 2: Unclamped Inductive Waveform
Fig. 4: Gate Charge test Circuit
Fig. 5: Test Circuit For Inductive Load Switching
And Diode Recovery Times
STB10NC50 -1
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