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STA533WFSTN/a42avai18 V, 3 A quad power half-bridge
STA533WF13TRSTN/a1588avai18 V, 3 A quad power half-bridge
STA533WF13TRSTMN/a8740avai18 V, 3 A quad power half-bridge


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STA533WF-STA533WF13TR
18 V, 3 A quad power half-bridge
June 2011 Doc ID 17658 Rev 2 1/15
STA533WF

18-volt, 3-amp, quad power half-bridge
Features
Multipower BCD technology Low input/output pulse width distortion 200-mΩ RdsON complementary DMOS output
stage CMOS-compatible logic inputs Thermal protection Thermal warning output Undervoltage protection Short-circuit protection
Description

The STA533WF is a monolithic quad half-bridge
stage in multipower BCD technology. The device
can be used as a dual bridge or reconfigured, by
connecting pin CONFIG to pins VDD, as a single
bridge with double-current capability.
The device is designed for the output stage of a
stereo Full Flexible Amplifier (FFX™). It is
capable of delivering 10 W x 4 channels into 4-Ω
loads with 10% THD at VCC =18V in
single-ended configuration.
It can also deliver 20 W + 20 W into 8-Ω loads
with 10% THD at VCC =18 V in BTL configuration
or, in single parallel BTL configuration, 40 W into
a 4-Ω load with 10% THD at VCC = 18V.
The input pins have a threshold proportional to
the voltage on pin VL.
The STA533WF comes in a 36-pin PowerSSO
package with exposed pad down (EPD).

Table 1. Device summary
Pin description STA533WF
2/15 Doc ID 17658 Rev 2
1 Pin description
Figure 1. Pin out

Table 2. Pin list
STA533WF Pin description
Doc ID 17658 Rev 2 3/15
Table 2. Pin list (continued)
Electrical characteristics STA533WF
4/15 Doc ID 17658 Rev 2
2 Electrical characteristics




Unless otherwise stated, the test conditions for Table 6 below are VL = 3.3 V, VCC = 18 V, =8 Ω, fSW = 384 kHz and Tamb = 25 °C.

Table 3. Absolute maximum ratings
Table 4. Recommended operating conditions
Table 5. Thermal data
Table 6. Electrical characteristics
STA533WF Electrical characteristics
Doc ID 17658 Rev 2 5/15
Table 6. Electrical characteristics (continued)
Electrical characteristics STA533WF
6/15 Doc ID 17658 Rev 2

Test circuits
Figure 2. Test circuit
Figure 3. Current dead time test circuit
Table 7. Logic truth table
STA533WF Applications information
Doc ID 17658 Rev 2 7/15
3 Applications information

The STA533WF is a dual-channel H-bridge audio power amplifier that can deliver 20 W per
channel into 8 Ω with 10% THD at VCC = 18 V with high efficiency.
The STA533WF converts both FFX and binary-logic-controlled PWM signals into audio
power at the load. It includes a logic interface, integrated bridge drivers, high-efficiency
MOSFET outputs and thermal and short-circuit protection circuitry.
In FFX mode, two logic-level signals per channel are used to control the high-speed
MOSFET switches which drive the speaker load in a bridge configuration, according to the
damped ternary modulation operation.
In binary mode, both full-bridge and half-bridge modes are supported.
The STA533WF includes overcurrent and thermal protection as well as an undervoltage
lockout with automatic recovery. A thermal warning status is also provided.
Figure 4. Block diagram for FFX or binary modes
Figure 5. Block diagram for binary half-bridge mode
Logic interface and decode

The STA533WF power outputs are controlled using one or two logic-level timing signals. In
order to provide a proper logic interface, pin VL must have the same voltage as the PWM
input signal.
Applications information STA533WF
8/15 Doc ID 17658 Rev 2
Protection circuits

The STA533WF includes protection circuitry for overcurrent and thermal overload
conditions. A thermal warning pin (THWARN) is activated low (open-drain MOSFET) when
the IC temperature exceeds 130 °C, which is in advance of the thermal shutdown protection.
When a fault condition is detected an internal fault signal acts to immediately disable the
output power MOSFETs, placing both H-bridges in the high-impedance state. At the same
time an open-drain MOSFET connected to pin FAULT is switched on.
There are two possible modes subsequent to activating a fault: Shutdown mode:
with pins FAULT (with pull-up resistor) and TRISTATE independent, an activated fault
disables the device, signalling low at pin FAULT.
The device may subsequently be reset to normal operation by toggling pin TRISTATE
from high to low and back to high using an external logic signal. Automatic recovery mode:
This is shown in the applications circuit in Figure 6 and Figure 7 on page 10.
Pins FAULT and TRISTATE are shorted together and connected to a time constant
circuit comprising R59 and C58.
An activated fault forces a reset on pin TRISTATE causing normal operation to resume
following a delay determined by the time constant of the circuit.
If the fault condition is still present this operation continues to repeat until the fault
condition is removed.
An increase in the time constant of the circuit produces a longer recovery interval.
Care must be taken in the overall system design so as not to exceed the protection
thresholds under normal operation.
Power outputs

The STA533WF power and output pins are duplicated to provide a low-impedance path for
the device bridged outputs. All duplicated power, ground and output pins must be connected
for reliable operation.
Pins PWRDN or TRIST ATE should be used to set all MOSFETS to the high-impedance
state during power-up and until the logic power supply on pin VL has settled.
Parallel-output and high-current operation

When using FFX mode, the STA533WF outputs can be connected in parallel to increase the
output current capability. In this configuration the device can provide 40 W into 4Ω.
This mode of operation is enabled with pin CONFIG connected to VDD. The inputs must be
combined to give INLA = INLB and INRA = INRB, then the corresponding outputs can be
shorted together to give OUTLA = OUTLB and OUTRA= OUTRB.
The snubber RC network shown in the applications figures must be placed as close as
possible to the output pins. This reduces ringing, over- and undervoltage effects, and
improves the audio quality and EMI performance.
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