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STA506STN/a1160avai40V 4A QUAD POWER HALF BRIDGE
STA50613TRSTMicroelectronicsN/a4800avai40V 4A QUAD POWER HALF BRIDGE
STA506-13TR |STA50613TRSTN/a125avai40V 4A QUAD POWER HALF BRIDGE


STA50613TR ,40V 4A QUAD POWER HALF BRIDGEFEATURESFigure 1. Package■ MINIMUM INPUT OUTPUT PULSE WIDTH DISTORTION■ 200mΩ R COMPLEMENTARY DMOS ..
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STA506-STA50613TR-STA506-13TR
40V 4A QUAD POWER HALF BRIDGE
1/14
STA506

November 2004 FEATURES MINIMUM INPUT OUTPUT PULSE WIDTH
DISTORTION 200mΩ RdsON COMPLEMENTARY DMOS
OUTPUT STAGE CMOS COMPATIBLE LOGIC INPUTS THERMAL PROTECTION THERMAL WARNING OUTPUT UNDER VOLTAGE PROTECTION SHORT CIRCUIT PROTECTION DESCRIPTION
STA506 is a monolithic quad half bridge stage in Mul-
tipower BCD Technology.
The device can be used as dual bridge or reconfig-
ured, by connecting CONFIG pin to Vdd pin, as single
bridge with double current capability, and as half
bridge (Binary mode) with half current capability.
The device is particularly designed to make the out-
put stage of a stereo All-Digital High Efficiency
(DDX™) amplifier capable to deliver 60 + 60W @
THD = 10% at Vcc 32V output power on 8Ω load and
80W @ THD = 10% at VCC 36V on 8Ω load in single
BTL configuration. In single BTL configuration is also
capable to deliver a peak of 120W @THD = 10% at
VCC = 32V on 4Ω load. The input pins have threshold
proportional to VL pin voltage.
40V 4A QUAD POWER HALF BRIDGE
Figure 2. Application Circuit (Dual BTL)

REV. 5
STA506
Table 2. Pin Function
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STA506
Table 3. Functional Pin Status

(*) : The pin is open collector. To have the high logic value, it needs to be pulled up by a resistor.
(**): To put CONFIG = 1 means connect Pin 24 (CONFIG) to Pins 21, 22 (Vdd) to implement single BTL (mono mode) operation for
high current.
Figure 3. Pin Connection
STA506
Table 4. Absolute Maximum Ratings
Table 5. (*) Recommended Operating Conditions

(*) performances not guaranteed beyond recommended operating conditions
Table 6. Thermal Data
Table 7. Electrical Characteristcs: refer to circuit in Fig.1 (VL = 3.3V; VCC = 32V; RL = 8Ω;

fsw = 384KHz; Tamb = 25°C unless otherwise specified)
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STA506

Notes:1. The following table explains the VLOW, VHIGH variation with VL
Table 8.

Note 2: See relevant Application Note AN1994
Table 9. Logic Truth Table (see fig. 4)
STA506
Figure 4. Test Circuit.
Figure 5.
Figure 6.
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STA506 TECHNICAL INFO:

The STA506 is a dual channel H-Bridge that is able to deliver more than 60W per channel (@ THD=10%) of
audio output power in high efficiency.
The STA506 converts both DDX and binary-controlled PWM signals into audio power at the load. It includes a
logic interface , integrated bridge drivers, high efficiency MOSFET outputs and thermal and short circuit protec-
tion circuitry.
In DDX mode, two logic level signals per channel are used to control high-speed MOSFET switches to connect
the speaker load to the input supply or to ground in a Bridge configuration, according to the damped ternary
Modulation operation.
In Binary Mode operation , both Full Bridge and Half Bridge Modes are supported. The STA506 includes over-
current and thermal protection as well as an under-voltage
Lockout with automatic recovery. A thermal warning status is also provided.
Figure 7. STA506 Block Diagram Full-Bridge DDX® or Binary Modes
Figure 8. STA506 Block Diagram Binary Half-Bridge Mode
3.1 Logic Interface and Decode:

The STA506 power outputs are controlled using one or two logic level timing signals. In order to provide a proper
logic interface, the Vbias input must operate at the dame voltage as the DDX control logic supply.
3.2 Protection Circuitry:

The STA506 includes protection circuitry for over-current and thermal overload conditions. A thermal warning
pin (pin.28) is activated low (open drain MOSFET) when the IC temperature exceeds 130C, in advance of the
thermal shutdown protection. When a fault condition is detected , an internal fault signal acts to immediately
disable the output power MOSFETs, placing both H-Bridges in high impedance state. At the same time an open-
drain MOSFET connected to the fault pin (pin.27) is switched on.
There are two possible modes subsequent to activating a fault:
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