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STS4DPF20L ,DUAL P-CHANNEL 20VELECTRICAL CHARACTERISTICS (T = 25 °C UNLESS OTHERWISE SPECIFIED)CASEOFFSymbol Parameter Test Condi ..
STS4DPF30L ,DUAL P-CHANNEL 30V ABSOLUTE MAXIMUM RATINGSSymbol Parameter Value UnitV Drain-source Voltage (V = 0) 30 VDS GSV Drain- ..
STS4DPFS20L ,P-CHANNEL 20V 0.07 OHM 4A SO-8 STRIPFET MOSFET PLUS SCHOTTKY RECTIFIERELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)OFFSymbol Parameter Test Condi ..
STS4DPFS2LS ,P-CHANNEL 20V 0.06 OHM 4A SO-8 STRIPFET MOSFET PLUS SCHOTTKY RECTIFIERELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)OFFSymbol Parameter Test Condi ..
STS4DPFS30L ,P-CHANNEL 30V 0.07 OHM 4A SO-8 STRIPFET MOSFET PLUS SCHOTTKY RECTIFIERELECTRICAL CHARACTERISTICS (TCASE = 25 °C UNLESS OTHERWISE SPECIFIED)OFFSymbol Parameter Test Condi ..
STS4NF100 ,N-CHANNEL 100VELECTRICAL CHARACTERISTICS (T = 25 °C unless otherwise specified)caseOFFSymbol Parameter Test Condi ..
STA333ML-STA333ML13TR-STA333MLJ13TR
Sound Terminal 2-channel microless high-efficiency digital audio system
March 2012 Doc ID 13177 Rev 6 1/21
A333ML2-channel microless high-efficiency digital audio system
Sound T erminal ®
Datasheet − production data
Features Wide supply voltage range (4.5 - 20V) 2 x 20 W into 8 Ω at VCC = 18V PowerSSO-36 exposed pad package 2 channels of 24-bit DDX® 100-dB SNR and dynamic range Selectable 32 kHz to 48 kHz input sample
rates Automatic zero-detect mute Automatic invalid input detect mute 2-channel I2 S input data interface Selectable clock input ratio (256or 364*fs) Max power correction for lower full power 96 kHz internal processing sample rate, 24-bit
precision Embedded thermal overload and short-circuit
protection Filterless configuration option
Applications LCDs DVDs Cradles Digital speakers Wireless speaker cradles
DescriptionThe STA333ML is a single die embedding digital
audio processing and high-efficiency power
amplification, capable of operating without the aid
of an external microcontroller.
The STA333ML is part of the Sound Terminal®
family that provides full digital audio streaming to
the speakers and offers cost effectiveness, low
power dissipation and sound enrichment.
The STA333ML combines a unique 24-bit DDX®
digital class-D ternary modulator together with an
extremely low RdsON stereo power DMOS stage.
The latter is capable of a total output power of x20 W with outstanding performance in terms
of efficiency (>90%), THD, SNR and EMI.
The microless feature allows its use in low-cost
applications (cradles, digital speakers, audio
terminals) where no microcontroller is needed.
The serial audio data interface accepts the
universally used I2 S format. Basic features, such
as the oversampling clock, gain, and I2 S format,
can be set using a minimal number of selection
pins.
The STA333ML is self-protected against thermal
overload, overcurrent, short-circuit and
overvoltage conditions.
The fault condition is also signalled on an external
pin (INT_LINE) for specific requirements.
Table 1. Device summary
Contents STA333ML2/21 Doc ID 13177 Rev 6
Contents Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 Electrical specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.3 Recommended operating condition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3.4 Electrical specifications - digital section . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.5 Electrical specifications - power section . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
3.6 Power-on sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
3.7 T est circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104.1 Serial audio interface protocols . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
4.2 Fault-detect recovery bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.3 Zero-detect mute enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.4 Fade-in/out feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.5 Oversampling selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.6 Gain selector . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.7 Power-down function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125.1 Applications schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.2 Internal voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.3 PLL filter schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.4 T ypical output configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Package thermal characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
STA333ML Block diagram
Doc ID 13177 Rev 6 3/21
1 Block diagram
Figure 1. Block diagram
Pin description STA333ML
4/21 Doc ID 13177 Rev 6
2 Pin description
Figure 2. Pin connections (top view)
Table 2. Pin description
STA333ML Pin description
Doc ID 13177 Rev 6 5/21
Table 2. Pin description (continued)
Electrical specifications STA333ML
6/21 Doc ID 13177 Rev 6
3 Electrical specifications
3.1 Absolute maximum ratings
3.2 Thermal data
3.3 Recommended operating condition
Table 3. Absolute maximum ratings
Table 4. Thermal data
Table 5. Recommended operating condition
STA333ML Electrical specifications
Doc ID 13177 Rev 6 7/21
3.4 Electrical specifications - digital section
Table 6. Electrical specifications for digital section
3.5 Electrical specifications - power section
The specifications given here are with the operating conditions: VCC = 18 V, VDD = 3.3V,
fsw = 384 kHz, Tamb = 25 °C, RL =8 Ω unless otherwise specified
Table 7. Electrical specifications for power section
Electrical specifications STA333ML
8/21 Doc ID 13177 Rev 6
Table 7. Electrical specifications for power section (continued)
STA333ML Electrical specifications
Doc ID 13177 Rev 6 9/21
3.6 Power-on sequence
Figure 3. Power-on sequence
3.7 Test circuits
Figure 4. Resistive load
Figure 5. Test circuit
Functional description STA333ML
10/21 Doc ID 13177 Rev 6
4 Functional description
4.1 Serial audio interface protocols
The STA333ML serial audio input interfaces with standard digital audio components and
accepts serial data formats. The STA333ML always acts as a slave when receiving audio
input from standard digital audio components. Serial data for two channels is provided using
3 input pins: left/right clock LRCKI (pin 29), serial clock BICKI (pin 28), and serial data SDI
(pin 30).
The available formats are given in Figure 6 and Figure 7. Pin FMT (pin 2) selects the format
such that FMT = logical 0 gives the I2 S format and FMT = logical 1 gives the left-justified.
Figure 6. I2S
Figure 7. Left-justified
STA333ML Functional description
Doc ID 13177 Rev 6 11/21
4.2 Fault-detect recovery bypass
The on-chip power output block provides feedback to the digital controller using inputs to
the power control block. The fault input is used to indicate a fault condition (either
overcurrent or thermal). When fault is asserted (set to 0), the power control block attempts a
recovery from the fault by asserting the 3-state output (setting it to 0 which directs the power
output block to begin recovery), holds it at 0 for 1 ms and then toggles it back to 1. This
sequence is repeated for as long as the fault exists.
4.3 Zero-detect mute enable
If this function is enabled, the zero-detect circuit examines each processing channel to see if
2048 consecutive zero value samples (regardless of fs) are received. If so, the channel is
muted.
4.4 Fade-in/out feature
The STA333ML has internal fade-in / fade-out feature when powered on or off, or after a
fault condition.
4.5 Oversampling selector
Pin ONSEL (33) is used to configure the PLL to accept 256 * fs or 384 * fs master clock.
Where fs is the I2 S LRCKI frequency:
ONSEL = logical 0 gives 256 * fs
ONSEL = logical 1 gives 384 * fs.
4.6 Gain selector
Pin GAIN (34) is used to configure the STA333ML gain:
GAIN = logical 0 gives 0 dBFs
GAIN = logical 1 gives 24 dBFs.
4.7 Power-down function
Pin PWDN (23) is used to power down the STA333ML:
PWDN = logical 0 sets the power-down mode
PWDN = logical 1 gives normal operation.
If the power stage is switched off, then the PLL is also switched off.
It is possible to use the PWDN function as a mute function.
