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ST7FLIT15BF1B6 ,8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPIfeatures FLASH memory withmodes.byte-by-byte In-Circuit Programming (ICP) and In-Application Progra ..
ST7FLIT15BF1B6 ,8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPIST7LITE1xB8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY,DATA EEPROM, ADC, 5 TIMERS, SPI■ Memories– up ..
ST7FLIT15BF1M6 ,8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPIFeatures ST7LITE10B ST7LITE15B ST7LITE19BProgram memory - bytes 2K/4KRAM (stack) - bytes 256 (128)D ..
ST7FLIT15BY0M6 ,8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPITable of Contents1 INTRODUCTION . . . . . . 42 PIN DESCRIPTION . . . . 53 REGISTER & ..
ST7FLIT19BF1B6 ,8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPIFEATURES . . . . . . 155.3 MEMORY ACCESS . . . . . 165.4 POWER SAVING MODES . . ..
ST7FLIT19BF1B6 ,8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPIABSOLUTE MAXIMUM RATINGS 11113.3 OPERATING CONDITIONS . . . . . 11213.4 SUPPLY CURRENT ..
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ST7FLIT15BF1B6-ST7FLIT15BF1M6-ST7FLIT15BY0M6-ST7FLIT19BF1B6-ST7FLIT19BF1M6
8-BIT MCU WITH SINGLE VOLTAGE FLASH MEMORY, DATA EEPROM, ADC, 5 TIMERS, SPI
June 2008 1/159
Rev 6
ST7LITE1xB

8-BIT MCU WITH SINGLE VOLT AGE FLASH MEMORY,T A EEPROM, ADC, 5 TIMERS, SPI Memories up to 4 Kbytes single voltage extended Flash
(XFlash) Program memory with read-out pro-
tection, In-Circuit Programming and In-Appli-
cation programming (ICP and IAP). 10K write/
erase cycles guaranteed, data retention: 20
years at 55°C. 256 bytes RAM 128 bytes data EEPROM with read-out pro-
tection. 300K write/erase cycles guaranteed,
data retention: 20 years at 55°C. Clock, Reset and Supply Management Enhanced reset system Enhanced low voltage supervisor (LVD) for
main supply and an auxiliary voltage detector
(AVD) with interrupt capability for implement-
ing safe power-down procedures Clock sources: Internal 1% RC oscillator (on
ST7FLITE15B and ST7FLITE19B), crystal/
ceramic resonator or external clock Internal 32-MHz input clock for Auto-reload
timer Optional x4 or x8 PLL for 4 or 8 MHz internal
clock Five Power Saving Modes: Halt, Active-Halt,
Auto Wake-up from Halt, Wait and Slow I/O Ports Up to 17 multifunctional bidirectional I/O lines
–7 high sink outputs 5 Timers Configurable watchdog timer Two 8-bit Lite Timers with prescaler,
1 realtime base and 1 input capture Two 12-bit Auto-reload Timers with 4 PWM
outputs, 1 input capture, 4 output compare
and one pulse functions Communication Interface SPI synchronous serial interface Interrupt Management 12 interrupt vectors plus TRAP and RESET 15 external interrupt lines (on 4 vectors) Analog Comparator A/D Converter 7 input channels Fixed gain Op-amp 13-bit precision for 0 to 430 mV (@ 5V VDD) 10-bit precision for 430 mV to 5V (@ 5V VDD) Instruction Set 8-bit data manipulation 63 basic instructions with illegal opcode de-
tection 17 main addressing modes 8 x 8 unsigned multiply instructions Development Tools Full hardware/software development package DM (Debug Module)
Device Summary


1 INTRODUCTION
The ST7LITE1xB is a member of the ST7 micro-
controller family. All ST7 devices are based on a
common industry-standard 8-bit core, featuring an
enhanced instruction set.
The ST7LITE1xB features FLASH memory with
byte-by-byte In-Circuit Programming (ICP) and In-
Application Programming (IAP) capability.
Under software control, the ST7LITE1xB device
can be placed in WAIT, SLOW, or HALT mode, re-
ducing power consumption when the application is
in idle or standby state.
The enhanced instruction set and addressing
modes of the ST7 offer both power and flexibility to
software developers, enabling the design of highly
efficient and compact application code. In addition
to standard 8-bit data management, all ST7 micro-
controllers feature true bit manipulation, 8x8 un-
signed multiplication and indirect addressing
modes.
For easy reference, all parametric data are located
in section 13 on page 110. The ST7LITE1xB fea-
tures an on-chip Debug Module (DM) to support
In-Circuit Debugging (ICD). For a description of
the DM registers, refer to the ST7 ICC Protocol
Reference Manual.
Figure 1. General Block Diagram
2 PIN DESCRIPTION
Figure 2. 20-Pin SO and DIP Package Pinout
Figure 3. 20-Pin QFN Package Pinout
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