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ST75C185B ,LOW POWER MULTIPLE RS-232 DRIVERS AND RECEIVERSELECTRICAL CHARACTERISTICS OVER OPERATING TEMPERATURE RANGE(V = 12V, V =-12V, V = 5V ± 10%, unless ..
ST75C185C ,LOW POWER MULTIPLE RS-232 DRIVERS AND RECEIVERSST75C185LOW POWERMULTIPLE RS-232 DRIVERS AND RECEIVERS■ MEETS STANDARD EIA-232-E■ SINGLE CHIP WITH ..
STR-A6131 , 120 V/12 or 16 W Flyback Switching Regulators
STR-A6151 , Universal-Input/13 or 16 W Flyback Switching Regulators
STR-A6151 , Universal-Input/13 or 16 W Flyback Switching Regulators
STR-A6159 , Universal-Input/13 or 16 W Flyback Switching Regulators
STR-A6159 , Universal-Input/13 or 16 W Flyback Switching Regulators
STR-A6169 , Universal-Input/5 W Flyback Switching Regulator
ST7570
S-FSK Power Line Networking System On Chip
September 2012 Doc ID 17526 Rev 2 1/26
ST7570S-FSK power line networking system-on-chip
Datasheet — production data
Features Fully integrated narrow-band power line
networking system-on-chip High performing PHY processor with
embedded turn-key firmware for spread
frequency shift keying (S-FSK) modulation: Programmable bit rate up to 2.4 Kbps (@
50 Hz) 1 Hz step programmable carriers up to
148.5 kHz Signal to noise ratio estimation Received signal strength indication Protocol engine embedding: IEC61334-5-1 PHY and MAC layers Alarm management Repeater Call procedure Intelligent search initiator process On chip peripherals: Host controller UART interface Fully integrated analog front end: ADC and DAC PGA with automatic gain control for high
receiving sensitivity High linearity modulated signal generation Fully integrated single-ended power amplifier
for line driving Up to 1 A rms, 14 V p-p output Configurable Active filtering topology Very high linearity Embedded temperature sensor Current control feature 8 to 18 V power amplifier supply 3.3 V or 5 V digital I/O supply Integrated 5 V and 1.8 V linear regulators for
AFE and digital core supply Mains zero crossing synchronization Suitable for EN50065 and FCC part 15
compliant applications VFQFPN48 package with exposed pad -40 °C to +85 °C temperature range
Applications Smart metering applications Street lighting control Command and control networking
Description The ST7570 is a powerful power line networking
system-on-chip. It combines a high-performance
PHY processor core and a protocol controller core
with a fully integrated analog front end (AFE) and
line driver.
The ST7570 features allow the most cost-
effective, single-chip power line communication
solution based on IEC61334-5-1 S-FSK standard.
Table 1. Device summary
Contents ST75702/26 Doc ID 17526 Rev 2
Contents Device overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42.1 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9 Analog front end (AFE) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 135.1 Reception path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.2 Transmission path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
5.3 Power amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
5.4 Current and voltage control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
5.5 Thermal shutdown and temperature control . . . . . . . . . . . . . . . . . . . . . . . 16
5.6 Zero-crossing PLL and delay compensation . . . . . . . . . . . . . . . . . . . . . . 16
Power management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Clock management . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Functional overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 188.1 References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
Physical layer . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209.1 S-FSK principles . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
9.2 Bit timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
9.3 Frame structure at physical level . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
9.4 Frame timing and time-slot synchronization . . . . . . . . . . . . . . . . . . . . . . . 22
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
ST7570 Device overview
Doc ID 17526 Rev 2 3/26
1 Device overview
Realized using a multi-power technology with state-of-the-art VLSI CMOS lithography, the
ST7570 is based on dual digital core architecture (a PHY processor engine and a protocol
controller core) to guarantee outstanding communication performance with a high level of
flexibility and programmability.
The on-chip analog front end, featuring analog to digital and digital to analog conversion and
automatic receiver gain control, plus the integrated Power Amplifier delivering up to 1Arms
output current, makes the ST7570 the first complete system-on-chip for power line
communication.
Line coupling network design is also simplified, leading to a very low cost BOM. Safe and
performing operations are guaranteed while keeping power consumption and distortion
levels very low, thus making ST7570 an ideal platform for the most stringent application
requirements and regulatory standards compliance.
Figure 1. Block diagram
Pin connection ST7570 Doc ID 17526 Rev 2
2 Pin connection
ST7570 Pin connection
Doc ID 17526 Rev 2 5/26
2.1 Pin description
Table 2. Pin description
Pin connection ST7570
6/26 Doc ID 17526 Rev 2
Table 2. Pin description (continued)
ST7570 Pin connection
Doc ID 17526 Rev 2 7/26
Table 3. UART baud rate selection
Maximum ratings ST7570
8/26 Doc ID 17526 Rev 2
3 Maximum ratings
3.1 Absolute maximum ratings
3.2 Thermal data
Figure 3. Absolute maximum ratings
Table 4. Thermal characteristics Mounted on a 2-side + vias PCB with a ground dissipating area on the bottom side. Same conditions as in Note 1, with maximum transmission duration limited to 100 s.
ST7570 Electrical characteristics
Doc ID 17526 Rev 2 9/26
4 Electrical characteristics
TA = -40 to +85°C, TJ < 125°C, VCC = 18 V unless otherwise specified.
Table 5. Electrical characteristics
Electrical characteristics ST7570
10/26 Doc ID 17526 Rev 2
Table 5. Electrical characteristics (continued)
ST7570 Electrical characteristics
Doc ID 17526 Rev 2 11/26
Table 5. Electrical characteristics (continued)
Electrical characteristics ST7570
12/26 Doc ID 17526 Rev 2 Referred to TA = -40 °C This parameter does not include the tolerance of external components Guaranteed by design
Table 5. Electrical characteristics (continued)
ST7570 Analog front end (AFE)
Doc ID 17526 Rev 2 13/26 Analog front end (AFE)
5.1 Reception path
5.2 Transmission path
Figure 5 shows the transmission path block diagram. it is mainly based on a digital to analog
converter (DAC), capable to generate a linear signal up to its full scale output. A gain control
block before the DAC gives the possibility to scale down the output signal to match the
desired transmission level.
