IC Phoenix
 
Home ›  SS96 > ST3917A-ST3917A/-ST3917B,SPEECH
ST3917A-ST3917A/-ST3917B Fast Delivery,Good Price
Part Number:
If you need More Quantity or Better Price,Welcom Any inquiry.
We available via phone +865332716050 Email
Partno Mfg Dc Qty AvailableDescript
ST3917ASTN/a483avaiSPEECH
ST3917A/ |ST3917ASTN/a208avaiSPEECH
ST3917BSTMN/a270avaiSPEECH
ST3917BSTN/a2410avaiSPEECH


ST3917B ,SPEECHST3917AST3917BSPEECH - TONE/PULSE DIALER - LED INDICATORSPEECH CIRCUIT DESCRIPTIONThe device consis ..
ST3DV520EQTR ,MUX/DEMUX for 4 differential channel LVDS and DDCApplicationsmultiplexer/demultiplexer low R bidirectional ONswitch used to switch between multiple ..
ST3DV520EQTR ,MUX/DEMUX for 4 differential channel LVDS and DDCElectrical characteristics . . . . . 74 Package mechanical data . . . . 165 Revision histo ..
ST3L01K7 ,TRIPLE VOLTAGE REGULATORABSOLUTE MAXIMUM RATINGS Symbol Parameter Value UnitV Supply Voltage18 VCCV ISupply Voltage18 ..
ST3L01K7R ,TRIPLE VOLTAGE REGULATORABSOLUTE MAXIMUM RATINGS Symbol Parameter Value UnitV Supply Voltage18 VCCV ISupply Voltage18 ..
ST3M01 ,TRIPLE VOLTAGE REGULATORELECTRICAL CHARACTERISTICS (Unless otherwise specified, please refer to the typical operating circ ..
STM809SWX6F ,320mW; I(o): 20mA; V(cc): -0.3 to +7.0V; reset circuitSTM809, STM810STM811, STM812Reset Circuit
STM809TWX6F ,320mW; I(o): 20mA; V(cc): -0.3 to +7.0V; reset circuitLogic Diagram (STM809/810) . . . . . . 4Figure 3.
STM810LWX6F ,320mW; I(o): 20mA; V(cc): -0.3 to +7.0V; reset circuitBlock Diagram . . 4Figure 7. Hardware Hookup . . . . . . . 5OPERATION . . . . ..
STM810MWX6F ,RESET CIRCUITLogic Diagram (STM811/812) . . . . . . 4Table 2. Signal Names . . 4Figure 4. SOT23-3 Co ..
STM810RWX6F ,RESET CIRCUITLogic Diagram (STM811/812) . . . . . . 4Table 2. Signal Names . . 4Figure 4. SOT23-3 Co ..
STM810SWX6F ,320mW; I(o): 20mA; V(cc): -0.3 to +7.0V; reset circuitSTM809, STM810STM811, STM812Reset Circuit


ST3917A-ST3917A/-ST3917B
SPEECH
ST3917A
ST3917B

SPEECH - TONE/PULSE DIALER - LED INDICA TOR
July 1996
SPEECH CIRCUIT
.2 TO 4 WIRES CONVERSION .PRESENT THE PROPER DC PATH FOR THE LINE
CURRENT AND THE FLEXIBILITY TO ADJUST IT
AND ALLOW PARALLEL PHONE OPERATION .SYMMETRICAL HIGH IMPEDANCE MICRO-
PHONE INPUTS SUITABLE FOR DYNAMIC,
ELECTRET OR PIEZOELECTRIC TRANSDUCER.ASYMMETRICAL EARPHONE OUTPUT SUIT-
ABLE FOR DYNAMIC TRANSDUCER.LINE LOSS COMPENSATION FIXED INTER-
NALLY BY A.G.C. .INTERNAL MUTING TO DISABLE SPEECH
DURING DIALING AND EXTERNAL MUTING
TO DISABLE TRANSMIT AMPLIFIER DURING
CONVERSATION MODE .LED INDICATOR EITHER FOR KEYBOARD ILLU-
MINATION (OR ON-LINE INDICATION) DURING
DIALING AND CONVERSATION OR FOR TONE
MODE INDICATION, THROUGH MU/MFI PIN
DIALER CIRCUIT
.STORE UP TO 32 DIGITS FOR LAST NUMBER
REDIAL BUFFER, LNR IS INHIBITED IF THERE
ARE MORE THAN 32 DIGITS STORED .ALLOW MIXED MODE DIALING IN PULSE MODE.PACIFIER TONE PROVIDES AUDIBLE INDI-
CATION OF VALID KEY PRESSED IN A BUZZ-
ER OR/AND IN THE EARPHONE .TIMED PABX PAUSE / 10PPS PULSE RATE.MAKE/BREAK RATIO : 40/60 (ST3917A) AND
33/67 (ST3917B) .4 SELECTABLE OPTIONS ON FLASH DURA-
TION AND SOFTSWITCH INHIBITION IN ONE
OF THE OPTION WITH 100ms FLASH TIMING.2 SELECTABLE OPTIONS : TRANSMIT MUTE
TOGETHER WITH LED FOR KEYBOARD ILLUMI-
NATION OR LED FOR TONE MODE INDICATION.CONTINUOUS TONE FOR EACH DIGIT UNTIL
KEY RELEASE .USES INEXPENSIVE 3.579545MHz CERAMIC
RESONATOR .POWERED FROM TELEPHONE LINE, LOW
OPERATING VOLTAGE FOR LONG LOOP AP-
PLICATION
DESCRIPTION

The device consists of the speech and the dialer func-
tions. It provides the DC line interface circuit that termi-
nates the telephone line, analog amplifier for speech
transmission and necessary signals for either DTMF
and pulse dialing. When mated with a tone ringer, a
complete telephone can be produced with just two ICs.
The DC line interface circuit develops its own line voltage
across the device and it is adjustable by external resistor
to suit different country’s specification. A built-in LED
driver can deliver excess line current to external LED
indicator(s) during dialing and speech mode. The
LED(s) can be used either for keyboard illumination
purpose or for tone mode indication during softswitch
and mixed mode dialing by connecting MU/MFI pin to
VDD and GND or any row respectively. The LED current
is limited to 17mA (typical).
The speech network provides the two to four wires inter-
face, electronic switching between dialing and speech and
automatic gain control on transmit and receive.
The dialing network buffers up to 32 digits into the LND
memory that can be later redialed with a single key input.
Users can store all 13 signalling keys and access
several unique functions with single key entries. These
functions include : Pause, Last Number Dialled (LND),
Softswitch and Flash. (see Figure 1).
The FLASH key simulates a hook flash to transfer calls
or to activate other special features provided by the
PABX or central office.
The PAUSE key stores a timed pause in the number
sequence. Redial is then delayed until an outside line
can be accessed or some other activities occur before
normal signalling resumes. A LND key automatically
redials the last number dialed.
A dedicated pin MU/MFI is used to select the muting for
transmit amplifier and lighted dial LED for keyboard
illumination or a LED indicator for tone mode indication.
The SEL pin allows selection of any one of the four
possible Flash duration options.
1/16
PIN CONNECTIONS
PIN DESCRIPTION
C1, C2, C3, R4, R3, R2, R1

(Keyboard inputs, Pins 1, 2, 3, 25, 26, 27, 28)
The device interfaces with either the standard 2 of with negative common or the single contact
(Form A) keyboard. Column 4 of the keypad is
connecting to ground.
A valid keypad entry is either a single Row con-
nected to a single Column or GND simultaneously
presented to both a single Row and a single Col-
umn. In its quiescent or standby state, during nor-
mal off-hook operation, the Rows are initialized at
logic level 1 (VDD) and the columns are initialized
at logic level 0 (GND). Pulling any row input low
enables the on chip oscillator. Keyboard scanning
then begins.
Figure 1 : Keyboard Configuration
Scanning consists of Rows and Columns alter-
nately switching high through on chip pullups. After
both a Row and Column keys have been detected,
the debounce counter is enabled and any noise
(bouncing contacts, etc) is ignored for a debounce
period (TKD) of 32ms. At this time, the keyboard is
sampled and if both the Row and Column informa-
tion are valid, the information is buffered into the
LND location.
In the tone mode, if two or more keys in the same
row or if two or more keys in the same column are
depressed a single tone will be output. The tone
will correspond to the common row or common
column for which the two keys were pushed. This
feature is for test purposes, and single tone will not
be redialed. Also in the tone mode, the output tone
is continuous in the manual dialing as long as the
key is pushed. The output tone duration follows the
Table 1. When redialing in the tone mode, each
DTMF output is 90ms duration, and the tone sepa-
ration (inter signal delay) is 90ms.
Table 1 : Output Tone Duration
ST3917A - ST3917B

2/16
SEL (Input, Pin 4)
This is an option selectable pin for four Flash
duration. The four options are summarised in the
table 2.
For option 1, softswitch feature is inhibited. It
means redialed by the LND key in pulse mode will
not repeat the softswitch and subsequent digits,
only pulse digits are dialed out.
Table 2 : Options Selectable for Flash Duration
OSC (Input, Pin 5)

Only one pin is needed to connect the ceramic
resonator to the oscillator circuit. The other end of
the resonator is connected to GND. The nominal
resonator frequency is 3.579545MHz and any de-
viation from this standard is directly reflected in the
Tone output frequencies. The ceramic resonator
provides the time reference for all circuit functions. ceramic resonator with tolerance of ±0.25% is
recommended.
PULSE (Output, Pin 6)

This is an output consisting of an open drain N-
channel device. During on-hook, pulse output pin
is in high impedance and once off-hook, it will be
pulled high by external resistor.
MODE/PT (Input, Pin 7)

Input (MODE). MODE determines the dialer’s de-
fault operating mode. When the device is powered
up or the hookswitch input is switched from on-
hook (VDD) to off-hook (GND), the default deter-
mines the signalling mode. A VDD connection
defaults to tone mode operation and a GND con-
nection defaults to pulse mode operation.
When dialing in the pulse mode, a softswitch fea-
ture will allow a change to the tone mode whenever
the * or softswitch key (TONE) is depressed. Sub-
sequent * key inputs will cause the DTMF code for
an * to be dialed. The softswitch will only switch
from pulse to tone. The phone will be in pulse mode
only after returning to on-hook and back to off-
hook. Redialed by the LND key will repeat the
softswitch unless the softswitch redial feature is
inhibited.
Output (PT). Pacifier Tone Output. In pulse mode,
all valid key entries activate the pacifier tone. In
tone mode, any non DTMF entry (FLASH, PAUSE,
LND, TONE) activates the pacifier tone. The paci-
fier tone provides audible feedback, confirming that
the key has been properly entered and accepted.
It is a 500Hz square wave activated upon accep-
tance of valid key input after the 32ms debounce
time.
The square wave terminates after 75ms typically or
when the valid key is no longer present. The pacifier
tone signal is simultaneously sent to the earphone
and the buzzer. The buzzer can be removed with-
out affecting this function. The resistor value set on
MODE/PT pin determines the level of the pacifier
tone in the earphone.
HKS (Input, Pin 8)

This is the hookswitch input to the device. It is a
CMOS input with a high pull up internal resistance
and must be switched high or open for on-hook
operation and low for off-hook operation. A transi-
tion on this input causes the on-chip logic to initial-
ize, terminating any operation in progress at the
time. The signalling mode defaults to the mode
selected at MODE/PT pin. Figures 2, 3 and 4, 5
illustrate the timing for this pin.
GND (Pin 9)

GND is the negative line terminal of the device. This
is the voltage reference for all specifications.
RXOUT, GRX, RXIN (Pins 10, 11 and 12)

The receive amplifier has one input RXIN and a non
inverting output RXOUT. Amplification from RXIN
to RXOUT is typically 31dB and it can be adjusted
between 21dB and 41dB to suit the sensitivity of
the earphone used. The amplification is propor-
tional to the external resistor connected between
GRX and RXOUT. For the hearing impaired, a
specific application to offer 17dB additional gain at
3kHz is permitted.
IREF (Pin 13)

An external resistor of 3.6kΩ connected between
IREF and GND will set the internal current level.
Any change of this resistor value will influence the
microphone gain, DTMF gain, earphone gain and
sidetone level.
VCC (Pin 14)

VCC is the positive supply of the speech network. It
can be stabilized by a decoupling capacitor be-
tween VCC and GND. The VCC supply voltage may
also be used to supply external peripheral circuits.
PIN DESCRIPTION (continued)
ST3917A - ST3917B

3/16
LED (Output, Pin 15)
When the MU/MFI pin is connected to either VDD
or GND, the LED connected to the LED pin, which
functions as a keyboard illumination or off-hook
indicator, will light up when the telephone is off-
hook.
When the MU/MFI pin is connected to any row pins,
the LED connected to LED pin functions as a tone
mode indicator.
From minimum operating line current up to 20mA,
ILN-ICC is sourced into the LED with a maximum
current limit of 18mA. For line current more than
20mA, this sourced current is limited at 18mA
(typical).
ILINE (Pin 16)

A recommended external resistor of 20Ω is con-
nected between ILINE and GND. Changing this
resistor value will influence the microphone gain,
DTMF gain, sidetone, maximum output swing on
LN and the DC characteristics, especially in the low
voltage region.
LN (Pin 17)

LN is the positive line terminal of the device.
REG (Pin 18)

The internal voltage regulator has to be decoupled
by a capacitor from REG to GND. The DC charac-
teristics can be changed with an external resistor
connected between LN and REG or between REG
and ILINE.
GTX, MIC-, MIC+ (Pins 19, 20, 21)

The device has a symmetrical microphone inputs.
The amplification from microphone inputs to LN is
51dB at 15mA line current and it can be adjusted
between 43 and 51dB. The amplification is propor-
tional to the external resistor connected between
GTX and REG.
GDTMF (Pin 22)

When the DTMF input is enabled, the microphone
inputs and the receive amplifier input will be muted
and the dialing tone will be sent on the line. The
voltage amplification from GDTMF to LN is 40dB.
Final output level on the LN can be adjusted via the
external resistor connected between GDTMF and
GND through a decoupling capacitor. A confidence
tone is sent to the earphone during tone dialing.
The attenuation of the confidence tone from LN to
RXOUT is -32dB typically. The level of the confi-
dence tone in the earphone can be increased by
adjusting the resistor connected between GDTMF
and GRX pins, the possible range is 20dB.
VDD (Pin 23)

VDD is the positive supply for the dialing circuit and
it must meet the maximum and minimum voltage
requirements.
MU/MFI (Input, Pin 24)

A logic low input to this pin will disable the transmit
amplifier of the speech circuit. MUTE efficiency is
greater than 60dB. An open circuit to this pin will
enable the transmit amplifier. In this case, LED is
used for keypad lighting.
A connection to any row will disable the transmit
mute function and the LED connected to the LED
pin is used for tone mode indication.
Table 3 : Logic of MU/MFI Pin Indicator
PIN DESCRIPTION (continued)
ST3917A - ST3917B

4/16
BLOCK DIAGRAM
ST3917A - ST3917B

5/16
ABSOLUTE MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS

(ILN = 10mA to 120mA, f = 1kHz, Tamb = 25°C, VDD = 3V ; unless otherwise specified)
ST3917A - ST3917B

6/16
Option Selectable
Notes :
1. All inputs unloaded. Quiescent mode (oscillator off). Pulse output sink current for VOUT = 0.5V at VDD = 3V. Pacifier tone sink current for VOUT = 0.5V, source current for VOUT = 2.5V at VDD = 3V. Memory retention voltage is the point where memory is guaranteed but circuit operation is not. Proper memory retention is
guaranteed if either the minimum IMR is provided or the minimum VMR. The design does not have to provide both the minimum
current and voltage. Option 1 is with softswitch inhibition.
ELECTRICAL CHARACTERISTICS (continued)

(ILN = 10mA to 120mA, f = 1kHz, Tamb = 25°C, VDD = 3V ; unless otherwise specified)
ST3917A - ST3917B

7/16
DEVICE OPERATION
During on-hook all keypad inputs are high imped-
ance internally and it requires very low current for
memory retention. At anytime, row inputs are initial-
ized at logic level 1 and column inputs are initialized
at logic level 0 at off-hook. The circuit verifies that
a valid key has been entered by alternately scan-
ning the Row and Column inputs. If the input is still
valid following 32ms of debounce, the digit is stored
into memory, and dialing begins after a pre-signal
delay of approximately 40ms measured from the
initial key closure. Output tone duration is shown in
Table 1.
The device allows manual dialing of an indefinite
number of digits, but if more than 32 digits are
dialed, LND will be inhibited.
Table 4 : DTMF Output Frequencies (Hz)
Normal Dialing
D D D ...

Normal dialing is straight forward, all keyboard
entries will be stored in the buffer and signalled in
succession.
Hook Flash
D Flash D ...

Hook flash may be entered into the dialed sequence
at any point by keying in the function key, FLASH.
When a FLASH key is pressed, no further key inputs
will be accepted until the hookflash function has been
dialed. The key input following a FLASH will be stored
as the initial digit of the new number (overwriting the
number dialed before the FLASH) unless it is another
FLASH. FLASH key pressed immediately after hook-
switch or LND will not clear the LND buffer unless
digits are entered following the FLASH key.
Flash

LND not cleared
LND Flash

LND not cleared
LND Flash D1 D2

LND buffer will contain D1, D2
Last Number Dialed
Off-Hook LND

Last number redialing is accomplished by entering
the LND key at off-hook or after the FLASH key, the
subsequent LND keys pressed will be ignored.
Last Number Dialed Inhibition

Last number redialing by LND key is inhibited if
there are more than 32 digits stored.
Last Number Dialed Cascading

Digits dial after the LND will cascade into the LND
buffer for the next redialing. In cascade operation,
the keyboard is inhibited upon pressing the LND
key, the LND output must be completed before
acceptance of any key entry.
Pause
Off-Hook D Pause D ...

A pause may be entered into the dialed sequence
at any point by keying in the special function key,
PAUSE. Pause inserts a 3.1 seconds (Tone mode)
or 3.4 seconds (Pulse mode) delay into the dialing
sequence. The total delay, including predigit and
post digit pauses as shown in Table 5.
Table 5 : Special Function Delays

Each delay shown in Table 5 represents the time
required from the time the special function key is
depressed until a new digit is dialed.
The time is considered "FIRST" key if all previous
inputs have been completely dialed. The time is
considered "AUTO" if in redial, or if previous digits
dialing is still in progress.
ST3917A - ST3917B

8/16
ic,good price


TEL:86-533-2716050      FAX:86-533-2716790
   

©2020 IC PHOENIX CO.,LIMITED