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ST21S07ACWSTN/a713avaiSCSI TERMINATOR


ST21S07ACW ,SCSI TERMINATORPIN CONFIGURATION SO-16L TSSOP20 PIN DESCRIPTION PlN N° PlN N° SYMBOL NA ..
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ST21S07ACW
SCSI TERMINATOR
1/10February 2001 FULLY COMPLIANT WITH SCSI, SCSI-2
AND EMERGING SCSI-E STANDARDS PROVIDES ACTIVE TERMINATION FOR
NINE SIGNAL LINES LOW DROPOUT (0.5V) VREGS:2.85V FACTORY TRIMMED TERMINATION 110Ω
(±2%) POWER DOWN MODE ISOLATES
TERMINATION RESISTORS FROM THE
BUS FULLY SUPPORTS ACTIVELY NEGATED
SCSI SIGNALS COMPATIBLE TO THE DS2107, DS2107A
AND DS21S07 ONBOARD THERMAL SHUTDOWN
CIRCUITRY AVAILABLE IN SO-16L AND TSSOP20 SCSI BUS HOT PLUG-COMPATIBLE
DESCRIPTION

The SCSI-2 and SCSI-3 standards recommend
the use of active terminations at both ends of
every cable segment in a SCSI system with a
single-ended drivers and reveivers. The
ST21S07A SCSI terminator, which is fully
compliant with these standands, enables the
designer to gain the benefits of active termination:
greater immunity to voltages drop on the
TERMPWR (TERMination PoWeR) line,
enhanced high level noise immunity, intrinsic
TERMPWR decouplig, and very low quiescent
current consumption.
The ST21S07A integrates a regulator and nine
precise switched 110Ω termination resistors into a
monolithic IC. The ST21S07A can be electrically
isolatesd from the SCSI bus without physical
removal from the SCSI device.
ORDERING CODES

(*) Available on request
ST21S07A

SCSI TERMINATOR
ST21S07A
2/10
PIN CONFIGURATION
PIN DESCRIPTION
ST21S07A
3/10
ABSOLUTE MAXIMUM RATINGS

Absolute Maximum Ratings are those values beyond which damage to the device may occur. Functional operation under these condition is
not implied.
RECOMMENDED OPERATING CONDITIONS
DC CHARACTERISTICS (TA = 0 to 70°C, unless otherwise specified.)
REGULATOR CHARACTERISTICS (T
A = 0 to 70°C, unless otherwise specified.)
Note 1: TERMPWR = 4V to 5.5V
Note2: Signal Lines = 0V to TERMPWR
Note3: All signal lines = 0V
Note 4: All signal lines open
Note 5: PD = 0V
Note 6: Guaranteed by design; not production tested
Note 7: R1 through R9 only
Note 8: R1 through R9 and PD
Note 9: VSIGNAL = 0.2V
ST21S07A
FUNCTIONAL DESCRIPTION

The ST21S07A consists of a bandgap reference,
buffer amplifier, and nine termination resistors
Figure 1). The bandgap reference circuit produces
a precise 1.25V level which is fed to a buffer
amplifier. The buffer produce a 2.85V level and is
capable of sourcing at least 24mA into each of the
termination resistors when the signal line is low
(active). When the driver for a given signal line
turns off, the terminator will pull the signal line to
2.85V (quiescent state). To handle actively
negated SCSI signals, the buffer can sink 200mA.
When all lines settle in the quiescent state, the
regulator will consume about 1.5mA. When the
ST21S07A is put into power-down mode by
bringing PD low, the power-down circuitry will turn
off the transistors on each signal line. This will
isolated the ST21S07A from the signal lines and
effectively remove it from the circuit. The
power-down pin (PD) has an internal pull-up
resistor.To place the ST21S07A into an active
state, the PD pin should be left open circuited.
To ensure proper operation, both the TERMPWR1
and TERMPWR2 pins must be connected to the
SCSI bus TREMPWR line and both the VREF1
and VREF2 pins must be tied together externally.
Each ST21S07A requires a 4.7μF capacitor
connected between the VREF pins and ground.
Figure 2 details a typical SCSI bus configuration.
In an 8-bit wide SCSI bus arrangement ("A"
Cable), two ST21S07A’s would be needed at each
end of the SCSI cable in order to terminate the 18
active signal lines. In a 16-bit SCSI bus
arrangement ("P" Cable), three ST21S07A’s
would be need at each end of the SCSI cable in
order to terminate the 27 active signal lines.
Figure 1 : Block Diagram
ST21S07A
5/10
Figure 2 : Typical Scsi Bus Configuraion

NOTES:
1) C1 = 4.7μF tantalium C2 = 2.2μF tantalium or 4.7mF aluminum
2) If the ST21S07A is to be embedded into a peripheral that will act as a target on a SCSI bus, it is that recommended TERMPWR be derived
from the SCSI cable, not generated locally. In this configuration, if a power failure occurs in the peripheral, it will not affect the bus.
3) A high frequency bypass capacitor (0.1μF recommended) can be added in parallel to C1 for applications using fast rise/fall time drivers.


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