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ST2189QTRSTMN/a15000avai8-bit dual supply level translator without direction control pin


ST2189QTR ,8-bit dual supply level translator without direction control pinApplicationswhich provides the level shifting capability to allow data transfer in a multi-voltage ..
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ST2189QTR
8-bit dual supply level translator without direction control pin
August 2009 Doc ID 15918 Rev 1 1/21
ST2189

8-bit dual supply level translator without direction control pin
Features
46 MHz: 92 Mbps data transfer when VCCA =
3.6V Bidirectional level translation without direction
control pin Wide voltage range of 1.65 V to 3.6 V for both
VCCA and VCCB Configurable voltage translation:
–VCCA can be ≥ VCCB or VCCA can be ≤ VCCB Partial power down support - when VCCB is
grounded, all the outputs will automatically go
to high impedance. Low quiescent current (5 µA) ESD performance: ±4 kV HBM (human body model)
Applications
Low voltage system level translation Mobile phones Other mobile devices
Description

The ST2189 is an 8-bit dual supply level translator
which provides the level shifting capability to allow
data transfer in a multi-voltage system. Externally
applied voltages, VCCB and VCCA, set the logic
levels on either side of the device. Its architecture
allows bidirectional level translation without a
control pin.
The ST2189 accepts VCCA from 1.65 V to 3.6V
and VCCB from 1.65 V to 3.6 V, making it ideal for
data transfer between low-voltage ASICs/PLD
and higher voltage systems. This device has a tri-
state output mode which can be used to disable
all I/Os.
In power down mode feature - when VCCB supply
is grounded, all I/Os go to high impedance
automatically, with very low quiescent current on
VCCA supply.



Table 1. Device summary
Pin settings ST2189
2/21 Doc ID 15918 Rev 1
1 Pin settings
1.1 Pin connection
Figure 1. Pin connection (top through view)
1.2 Pin description

Table 2. Pin description
ST2189 Pin settings
Doc ID 15918 Rev 1 3/21

Table 2. Pin description (continued)
Logic diagram ST2189
4/21 Doc ID 15918 Rev 1
2 Logic diagram
Figure 2. Logic block diagram
ST2189 Logic diagram
Doc ID 15918 Rev 1 5/21
2.1 Device block diagram
Figure 3. ST2189 block diagram
Figure 4. Application block diagram
Supplementary notes ST2189
6/21 Doc ID 15918 Rev 1
3 Supplementary notes
3.1 Driver requirement

It must be ensured that the driver is able to source and sink a minimum of 1mA current on
both sides of the device. The device requires the driver to source/sink a maximum current of
(VCC/4) mA to/from the weak 4 kΩ output buffer in order to change the state of the output.
3.2 Load driving capability
o support the level translation without direction pin architecture, the one-shot transistor at
the output side is only turned ON during state transition. After the one-shot transistor is
turned OFF , only the 4 kΩ pull-up/down resistor maintains the state of the output. As a
result, resistive load or pull-up resistor less than 50 kΩ is not recommended.
3.3 Ensuring low current consumption during off state

The OE pin can be tied to the enable signal which is driving the enable pin of the slave
device to ensure that the device will turn off and put all I/Os to tri-state mode whenever the
slave device is not needed. On the event that the enable signal driving into the slave device
is active low, the signal going into the OE pin for ST2189 (active high) needs to be inverted
accordingly.
Alternatively, a pull-down resistor can be added to the VCCB supply. This will ensure that the
VCCB supply does not float whenever the supply is turned off. All the I/Os go to high
impedance automatically when this happens.
3.4 Truth table
Table 3. Truth table
High level VCCA power supply referred. High level VCCB power supply referred. Z = High impedance.
ST2189 Maximum ratings
Doc ID 15918 Rev 1 7/21
4 Maximum ratings

Stressing the device above the rating listed in the “absolute maximum ratings” table may
cause permanent damage to the device. These are stress ratings only and operation of the
device at these or any other conditions above those indicated in the operating sections of
this specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
4.1 Recommended operating conditions


Table 4. Absolute maximum ratings
Table 5. Recommended operating conditions
Electrical characteristics ST2189
8/21 Doc ID 15918 Rev 1
5 Electrical characteristics

Device electrical characteristics over recommended operating conditions (unless otherwise
noted). All typical values are at TA = 25 °C.
Table 6. DC characteristics
ST2189 Electrical characteristics
Doc ID 15918 Rev 1 9/21
Table 6. DC characteristics (continued)
Electrical characteristics ST2189
10/21 Doc ID 15918 Rev 1
5.1 AC characteristics
Table 6. DC characteristics (continued)
Table 7. For test conditions: VCCA = 1.65V (load CL= 15 pF; driver tr = tf ≤ 2ns)
overtemperature range -40 °C to 85°C
Data rates are measured at worst case condition when all 8 channels are switching at the same time. Data rate is
guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period of input I/O signal; input I/O
signal is at 50% duty-cycle and output I/O signal duty-cycle deviation is less than 50% ± 10%.
ST2189 Electrical characteristics
Doc ID 15918 Rev 1 11/21
Table 8. For test conditions: VCCA = 2.5 V (load CL= 15 pF; driver tr = tf ≤
2 ns) overtemperature
range -40 °C to 85 °C
Data rates are measured at worst case condition when all 8 channels are switching at the same time. Data rate is
guaranteed based on the condition that output I/O signal rise/fall time is less than 15% of period of input I/O signal; input I/O
signal is at 50% duty-cycle and output I/O signal duty-cycle deviation is less than 50% ± 10%.
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