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SSM2164
Low Cost Quad Voltage Controlled Amplifier
REV.0
Low Cost Quad
Voltage Controlled Amplifier
GENERAL DESCRIPTIONThe SSM2164 contains four independent voltage controlled
amplifiers (VCAs) in a single package. High performance
(100dB dynamic range, 0.02% THD) is provided at a very low
cost-per-VCA, resulting in excellent value for cost sensitive gain
control applications. Each VCA offers current input and output
for maximum design flexibility, and a ground referenced
–33mV/dB control port.
All channels are closely matched to within 0.07dB at unity gain,
and 0.24dB at 40dB of attenuation. A 120dB gain range is
possible.
A single resistor tailors operation between full Class A and AB
modes. The pinout allows upgrading of SSM2024 designs with
minimal additional circuitry.
The SSM2164 will operate over a wide supply voltage range of4 V to ±18 V. Available in 16-pin P-DIP and SOIC packages,
the device is guaranteed for operation over the extended
industrial temperature range of –40°C to +85°C.
FEATURES
Four High Performance VCAs in a Single Package
0.02% THD
No External Trimming
120dB Gain Range
0.07dB Gain Matching (Unity Gain)
Class A or AB Operation
APPLICATIONS
Remote, Automatic, or Computer Volume Controls
Automotive Volume/Balance/Faders
Audio Mixers
Compressor/Limiters/Compandors
Noise Reduction Systems
Automatic Gain Controls
Voltage Controlled Filters
Spatial Sound Processors
Effects Processors
FUNCTIONAL BLOCK DIAGRAMGNDV–MODE
IIOUT
IIOUT
IIOUT
IIOUT
IIN
IIN
IIN
IIN
SSM2164–SPECIFICATIONS
ELECTRICAL SPECIFICATIONSCONTROL PORT
POWER SUPPLIES
NOTES–10 dBu input @ 20 dB gain; +10 dBu input @ –20 dB gain.After 60 seconds operation.+25°C to +85°C.
Specifications subject to change without notice.
TYPICAL APPLICATION AND TEST CIRCUITS = ±15 V, AV = 0 dB, 0 dBu = 0.775 V rms, VIN = 0 dBu, RIN = ROUT = 30 kΩ, f = 1 kHz,
–40°C < TA < +85°C using Typical Application Circuit (Class AB), unless otherwise noted. Typical specifications apply at TA = +25°C.)
VIN4
500Ω
560pF(7.5kΩ CLASS A)
(OPEN CLASS AB)
+15V–15V
VOUT4
VC4
IIN
ORDERING GUIDE
ABSOLUTE MAXIMUM RATINGSSupply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±18 V
Input, Output, Control Voltages . . . . . . . . . . . . . . . . V– to V+
Output Short Circuit Duration to GND . . . . . . . . . Indefinite
Storage Temperature Range . . . . . . . . . . . . –65°C to +150°C
Operating Temperature Range . . . . . . . . . . . . .–40°C to +85°C
Junction Temperature Range . . . . . . . . . . . . –65°C to +150°C
Lead Temperature Range (Soldering 60 sec) . . . . . . . . +300°C
*θJA is specified for the worst case conditions; i.e., θJA is specified for device in socket
for P-DIP packages, θJA is specified for device soldered in circuit board for SOIC
package.
PIN CONFIGURATION
16-Lead Epoxy DIP and SOIC
CAUTIONESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the SSM2164 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
SSM2164
Typical Performance CharacteristicsFigure 2.THD+N vs. Frequency, Class A
Figure 3.THD+N vs. Frequency Class, AB
THD – %
UNITSFigure 5.THD Distribution, Class AB
Figure 6.THD+N vs. Amplitude
0.10±20
0.02
0.08±16±12±8
THD + N – %
SUPPLY – Volts
THD + N – %1001k10k20k
FREQUENCY – Hz
THD + N – %1001k10k20k
FREQUENCY – Hz
AMPLITUDE – VRMS
THD + N – %1001k10k20k
Figure 11.Voltage Noise Density vs. RBIASFigure 8.THD vs. Temperature, Class A
Figure 9.THD vs. Temperature, Class ABFigure 12.THD vs. RBIAS
Figure 13.Control Feedthrough vs. RBIASFigure 10.Voltage Noise Density vs. Frequency, Class AB
0.0110k1M100k
RBIAS – Ω
THD – %
TEMPERATURE – °C
% THD
40010100k10k1k100
FREQUENCY – Hz
NOISE – nV/ Hz
TEMPERATURE – °C
% THD
SSM2164
Typical Performance Characteristics
10k10M1M100k1k
GAIN – dB
FREQUENCY – Hz
PHASE – DegreesFigure 14.Gain/Phase vs. Frequency
100100k10k1k10
GAIN – dB
FREQUENCY – HzFigure 15.Gain Flatness vs. Frequency
1001k10M1M100k10k
FREQUENCY – Hz
GAIN – dBFigure 17.–3 dB Bandwidth vs. I-to-V Feedback Capacitor
Figure 18.Slew Rate vs. I-to-V Feedback Capacitor
