SSM2018T-SSM2018-T-SSM2018TS Fast Delivery |IC PHOENIX CO.,LIMITED

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SSM2018T-SSM2018-T-SSM2018TS
Trimless Voltage Controlled Amplifiers
FUNCTIONAL BLOCK DIAGRAMS
GENERAL DESCRIPTION
The SSM2018T and SSM2118T represent continuing evolu-
tion of the Frey Operational Voltage Controlled Element
(OVCE) topology that permits flexibility in the design of high
performance volume control systems. Voltage (SSM2018T)
and differential current (SSM2118T) output versions are of-
fered, both laser-trimmed for gain core symmetry and offset. As
a result, the SSM2018T is the first professional audio quality
VCA to offer trimless operation. The SSM2118T is ideal for
low noise summing in large VCA based systems.
Due to careful gain core layout, the SSM2018T/SSM2118T
combine the low noise of Class AB topologies with the low dis-
tortion of Class A circuits to offer an unprecedented level of
sonic transparency. Additional features include differential in-
puts, a 140dB gain range, and a high impedance control port.
The SSM2018T provides an internal current-to-voltage con-
verter; thus no external active components are required. The
SSM2118T has fully differential current outputs that permit
high noise-immunity summing of multiple channels.
Both devices are offered in 16-pin plastic DIP and SOIC pack-
ages and guaranteed for operation over the extended industrial
temperature range of –40°C to +85°C.
*. Patent Nos. 4,471,320 and 4,560,947.
FEATURES
117dB Dynamic Range
0.006% Typical THD+N (@ 1kHz, Unity Gain)
140dB Gain Range
No External Trimming Required
Differential Inputs
Complementary Gain Outputs
Buffered Control Port
I–V Converter On-Chip (SSM2018T)
Differential Current Outputs (SSM2118T)
Low External Parts Count
Low Cost
Trimless
Voltage Controlled Amplifiers
REV. A
SSM1018T/SSM2118T–SPECIFICATIONS
ELECTRICAL SPECIFICATIONS
INPUT AMPLIFIER
OUTPUT AMPLIFIER (SSM2018T)
CONTROL PORT
POWER SUPPLIES
NOTESSSM2118T tested and characterized using OP275 as current-to-voltage converter, see figure next page.Guaranteed by characterization data and testing at AV = 0 dB.
Specifications subject to change without notice.
[VS = ±15V, AV = 0dB, RL = 100kΩ, f = 1kHz, 0dBu = 0.775Vrms, simple VCA application
circuit with 18kΩ resistors, –VIN floating, and Class AB gain core bias (RB = 150kΩ), –40°C < TA < +85°C, unless otherwise noted. Typical
specifications apply at TA = +25°C.]
ABSOLUTE MAXIMUM RATINGS1
Supply Voltage
Dual Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±18V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±VS
Operating Temperature Range . . . . . . . . . . . . .–40°C to +85°C
Storage Temperature . . . . . . . . . . . . . . . . . . .–65°C to +150°C
Junction Temperature (TJ) . . . . . . . . . . . . . . . . . . . . .+150°C
Lead Temperature (Soldering, 60 sec) . . . . . . . . . . . . .+300°C
THERMAL CHARACTERISTICS
Thermal Resistance2
16-Pin Plastic DIP
θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76°C/W
θJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33°C/W
16-Pin SOIC
θJA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .92°C/W
θJC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27°C/W
TRANSISTOR COUNT
Number of Transistors
SSM2018T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .125
SSM2118T . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .108
ESD RATINGS
883 (Human Body) Model . . . . . . . . . . . . . . . . . . . . . . .500V
EIAJ Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .100V
1Stresses above those listed under “Absolute Maximum Ratings” may cause
permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the
operation section of this specification is not implied. Exposure to absolute maxi-
mum rating conditions for extended periods may affect device reliability.θJA is specified for worst-case conditions, i.e., θJA is specified for device in socket
for P-DIP and device soldered in circuit board for SOIC package.
*N = Plastic DIP; R = SOL.
PIN CONFIGURATIONS
16-Lead Plastic DIP
and SOL
16-Lead Plastic DIP
and SOL
SSM2018T Typical Application Circuit
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000
accumulate on the human body and test equipment and can discharge without detection.
Although the SSM2018T/SSM2118T features proprietary ESD protection circuitry, permanent
damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper
ESD precautions are recommended to avoid performance degradation or loss of functionality.
SSM2018T/SSM2118T–Typical Characteristics
THD + N – %1001k10k20k
FREQUENCY – Hz
Figure 1.SSM2018T THD + N Frequency (80 kHz Low-Pass
Filter, for AV = 0 dB, VIN = 3 V rms; for AV = +20 dB,
VIN = 0.3 V rms; for AV = –20 dB, VIN = 3 V rms)
DISTORTION – %
UNITS
Figure 2.SSM2018T Distortion Distribution
THD + N – %
AMPLITUDE – VRMS
THD + N – %
10m0.112
AMPLITUDE – VRMS
Figure 4.SSM2018T THD + N vs. Amplitude
(Gain = +20 dB, fIN=1 kHz, 80 kHz Low-Pass Filter)
GAIN – dB
THD + N – %
Figure 5.SSM2018T THD + N vs. Gain (fIN = 1 kHz;
for –60 dB ≤ AV ≤ –20 dB, VIN = 10 V rms;
for 0 dB ≤ AV ≤ +20 dB, VIN = 1 V rms)
THD + N – %
0.001±12
0.01±6±9±15±18
SUPPLY VOLTAGE – Volts
LOAD RESISTANCE – Ω
MAXIMUM OUTPUT SWING – V
PEAK
±15
±12
1001k100k10k
Figure 10.SSM2018T Maximum Output Swing vs.
Load Resistance, (THD = 1 % max)
Figure 11.SSM2018T Output Offset vs. Gain
+10
–151M100k10k100
FREQUENCY – Hz
GAIN – dB
PHASE – Degrees
Figure 12.SSM2018T Gain/Phase vs. Frequency
Figure 7.SSM2018T Noise Density vs. Frequency
±15
±10
±20
±20±15±10
SUPPLY VOLTAGE – Volts
OUTPUT VOLTAGE SWING – V
PEAK
Figure 8.SSM2018T Maximum Output Swing vs.
Supply Voltage (THD = 1% max)
FREQUENCY – Hz
MAXIMUM OUTPUT SWING – V
PEAK10k100k
±12
±15
Figure 9.SSM2018T Maximum Output Swing vs.
SSM2018T/SSM2118T–Typical Characteristics
1001k10M1M100k10k
FREQUENCY – Hz
GAIN – dB
Figure 13.SSM2018T Gain vs. Frequency
THD + N – %
0.0011001k10k20k
FREQUENCY – Hz
Figure 14.SSM2118T THD + N Frequency (80 kHz
Low-Pass Filter, for AV = 0 dB, VIN = 1 V rms;
for AV = +20 dB, VIN = 0.1 V rms; for AV = –20 dB,
VIN = 10 V rms)
DISTORTION – %
UNITS
AMPLITUDE – VRMS
THD + N – %
Figure 16.SSM2118T THD + N vs. Amplitude
(Gain = 0 dB, fIN = 1 kHz, 80 kHz Low-Pass Filter)
Figure 17.SSM2118T THD + N vs. Amplitude
(Gain = +20 dB, fIN= 1 kHz, 80 kHz Low-Pass Filter)
SUPPLY VOLTAGE – Volts
THD + N – %
0.001±3±6±9±12±15±18
Figure 19.SSM2118T THD + N vs. Supply Voltage
(AV = 0 dB, VIN = 1 V rms, fIN = 1 kHz, 80 kHz
Low-Pass Filter)
Figure 20.SSM2118T Noise Density vs. Frequency
±15
±10±5±10±15±20
±20
SUPPLY VOLTAGE – Volts
OUTPUT VOLTAGE SWING – V
PEAK
±20
Figure 21.SSM2118T Maximum Output Swing vs.
Figure 22.SSM2118T Maximum Output Swing vs.
Frequency (THD = 1 % max)
Figure 23.SSM2118T Output Offset Current vs. Gain
+10
–151M100k10k100
FREQUENCY – Hz
GAIN – dB
PHASE – Degrees
Figure 24.SSM2118T Gain/Phase vs. Frequency
SSM2018T/SSM2118T
1001k10M1M100k10k
FREQUENCY – Hz
GAIN – dB
Figure 25.SSM2118T Gain vs. Frequency
TEMPERATURE – °C
DISTORTION – %
Figure 26.SSM2018T and SSM2118T Distortion vs.
Temperature
GAIN – dB
OUTPUT NOISE – dBu
Figure 27.SSM2018T and SSM2118T Output Noise vs.
Gain (VIN = GND, 20 kHz Bandwidth)
UNITS
CONTROL FEEDTHROUGH – mV
–3.0–2.0–1.001.02.0
Figure 28.SSM2018T Control Feedthrough Distribution
Figure 29. SSM2018T and SSM2118T Control
Feedthrough vs. Frequency
Figure 30.SSM2018T and SSM2118T Control

Partno	Mfg	Dc	Qty	Available	Descript
SSM2018T	AD	N/a	1	avai	Trimless Voltage Controlled Amplifiers
SSM2018TS	AD	N/a	2	avai	Trimless Voltage Controlled Amplifiers
SSM2018-T \|SSM2018T	AD	N/a	1	avai	Trimless Voltage Controlled Amplifiers